[Intel-gfx] [PATCH 3/6] drm/i915: Fix and improve MCR selection logic

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-07-17 19:06:21)
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> A couple issues were present in this code:
> 
> 1.
> fls() usage was incorrect causing off by one in subslice mask lookup,
> which in other words means subslice mask of all zeroes is always used
> (subslice mask of a slice which is not present, or even out of bounds
> array access), rendering the checks in wa_init_mcr either futile or
> random.
> 
> 2.
> Condition in WARN_ON was not correct. It is doing a bitwise and operation
> between a positive (present subslices) and negative mask (disabled L3
> banks).
> 
> This means that with corrected fls() usage the assert would always
> incorrectly fail.
> 
> We could fix this by inverting the fuse bits in the check, but instead do
> one better and improve the code so it not only asserts, but finds the
> first common index between the two masks and only warns if no such index
> can be found.
> 
> v2:
>  * Simplify check for logic and redability.
>  * Improve commentary explaining what is really happening ie. what the
>    assert is really trying to check and why.
> 
> v3:
>  * Find first common index instead of just asserting.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Fixes: fe864b76c2ab ("drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads")
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> # v1

It's still magic to me, but I can attest that it does what you say, and
should be no worse than before :)
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris