[Intel-gfx] [PATCH 6/6] drm/i915/icl: Add Wa_1409178092

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-07-17 19:06:24)
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> We were missing this workaround which can cause hangs if fine grained
> coherency was used.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
>  drivers/gpu/drm/i915/i915_reg.h             | 3 +++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index ff532ff5d574..704ace01e7f5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1297,6 +1297,12 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>                 wa_write_or(wal,
>                             GEN7_SARCHKMD,
>                             GEN7_DISABLE_SAMPLER_PREFETCH);
> +
> +               /* Wa_1409178092:icl */
> +               wa_write_masked_or(wal,
> +                                  GEN11_SCRATCH2,
> +                                  GEN11_COHERENT_PARTIAL_WRITE_MERGE_ENABLE,
> +                                  0);

It's mentioned that this is only for HAS_LLC(), to avoid coming back to
this in future, I'd mark it up now.

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris