[Intel-gfx] [PATCH 16/22] drm/i915/tgl: Implement Wa_1604555607
Lucas De Marchi
lucas.demarchi at intel.com
Fri Jul 19 17:41:39 UTC 2019
On Thu, Jul 18, 2019 at 07:03:26AM +0100, Tvrtko Ursulin wrote:
>
>On 13/07/2019 02:09, Lucas De Marchi wrote:
>>From: Michel Thierry <michel.thierry at intel.com>
>>
>>Implement Wa_1604555607 (set the DS pairing timer to 128 cycles).
>>FF_MODE2 is part of the register state context, that's why it is
>>implemented here.
>>
>>Signed-off-by: Michel Thierry <michel.thierry at intel.com>
>>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>>---
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 ++++++++
>> drivers/gpu/drm/i915/i915_reg.h | 5 +++++
>> 2 files changed, 13 insertions(+)
>>
>>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>index ed92738a0735..347ba16346d3 100644
>>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>@@ -585,6 +585,14 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
>> static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
>> struct i915_wa_list *wal)
>> {
>>+ struct drm_i915_private *dev_priv = engine->i915;
>>+ u32 val;
>>+
>>+ /* Wa_1604555607:tgl */
>>+ val = I915_READ(FF_MODE2);
>
>Suggest to switch to uncore mmio and get it from the engine.
will do for next version
thanks
Lucas De Marchi
>
>Regards,
>
>Tvrtko
>
>P.S. Removed Michel from CC.
>
>>+ val &= ~FF_MODE2_TDS_TIMER_MASK;
>>+ val |= FF_MODE2_TDS_TIMER_128;
>>+ wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val);
>> }
>> static void
>>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>>index 0a2657ce284f..d048c349e07e 100644
>>--- a/drivers/gpu/drm/i915/i915_reg.h
>>+++ b/drivers/gpu/drm/i915/i915_reg.h
>>@@ -7789,6 +7789,11 @@ enum {
>> #define PIXEL_ROUNDING_TRUNC_FB_PASSTHRU (1 << 15)
>> #define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7)
>>+#define FF_MODE2 _MMIO(0x6604)
>>+#define FF_MODE2_TDS_TIMER_SHIFT (16)
>>+#define FF_MODE2_TDS_TIMER_128 (4 << FF_MODE2_TDS_TIMER_SHIFT)
>>+#define FF_MODE2_TDS_TIMER_MASK (0xff << FF_MODE2_TDS_TIMER_SHIFT)
>>+
>> /* PCH */
>> #define PCH_DISPLAY_BASE 0xc0000u
>>
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