[Intel-gfx] [PATCH stable v5.2] drm/i915/vbt: Fix VBT parsing for the PSR section

Souza, Jose jose.souza at intel.com
Wed Jul 24 17:27:42 UTC 2019


On Wed, 2019-07-24 at 14:06 +0200, Greg KH wrote:
> On Mon, Jul 22, 2019 at 04:13:25PM -0700, Dhinakaran Pandiyan wrote:
> > A single 32-bit PSR2 training pattern field follows the sixteen
> > element
> > array of PSR table entries in the VBT spec. But, we incorrectly
> > define
> > this PSR2 field for each of the PSR table entries. As a result, the
> > PSR1
> > training pattern duration for any panel_type != 0 will be parsed
> > incorrectly. Secondly, PSR2 training pattern durations for VBTs
> > with bdb
> > version >= 226 will also be wrong.
> > 
> > Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Cc: José Roberto de Souza <jose.souza at intel.com>
> > Cc: stable at vger.kernel.org
> > Cc: stable at vger.kernel.org #v5.2
> > Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field
> > with PSR2 TP2/3 wakeup time")
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
> > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> > Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Reviewed-by: José Roberto de Souza <jose.souza at intel.com>
> > Acked-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Tested-by: François Guerraz <kubrick at fgv6.net>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Link: 
> > https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@intel.com
> > (cherry picked from commit
> > b5ea9c9337007d6e700280c8a60b4e10d070fb53)
> 
> There is no such commit in Linus's kernel tree :(
> 

It is still on drm-intel/drm-intel-next-queued -
ssh://git.freedesktop.org/git/drm-intel

Rodrigo do you know when is the next pull-request to Linus?


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