[Intel-gfx] [PATCH] Revert "ALSA: hda - Fix intermittent CORB/RIRB stall on Intel chips"

Chris Wilson chris at chris-wilson.co.uk
Thu Jul 25 13:57:10 UTC 2019


Quoting Takashi Iwai (2019-07-25 14:45:10)
> On Thu, 25 Jul 2019 12:49:12 +0200,
> Chris Wilson wrote:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13745/fi-icl-u2/igt@i915_module_load@reload.html
> > <4> [383.858354] snd_hda_intel 0000:00:1f.3: azx_get_response timeout, switching to polling mode: last cmd=0x20170500
> > <4> [384.860261] snd_hda_intel 0000:00:1f.3: No response from codec, disabling MSI: last cmd=0x20170500
> > <3> [556.636243] snd_hda_codec_hdmi hdaudioC0D2: Unable to sync register 0x2f8100. -11
> 
> Looking at the logs around this, you can find:
> 
> <7>[  380.741747] [IGT] i915_module_load: executing
> <7>[  380.745788] [IGT] i915_module_load: starting subtest reload
> <4>[  383.858354] snd_hda_intel 0000:00:1f.3: azx_get_response timeout, switching to polling mode: last cmd=0x20170500
> <4>[  384.860261] snd_hda_intel 0000:00:1f.3: No response from codec, disabling MSI: last cmd=0x20170500
> <3>[  556.636243] snd_hda_codec_hdmi hdaudioC0D2: Unable to sync register 0x2f8100. -11
> <3>[  556.636243] snd_hda_codec_hdmi hdaudioC0D2: Unable to sync register 0x2f8100. -11
> <7>[  556.636556] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
> <7>[  556.636681] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
> <7>[  556.636775] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
> <7>[  556.636865] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
> <7>[  556.636959] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
> <7>[  556.637042] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
> <7>[  556.637134] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
> <7>[  556.637312] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
> <7>[  556.637445] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
> <7>[  556.637557] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
> <7>[  556.637664] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
> <7>[  556.637751] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
> <7>[  556.637825] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
> <7>[  556.637900] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
> <7>[  556.679134] [IGT] i915_module_load: executing
> <7>[  556.681585] [IGT] i915_module_load: starting subtest reload-no-display
> 
> What does it actually do?  First off, there is a big gap in the
> timestamps between 384 and 556.

Therein is where our current problem lies. Looking at the run just before
this pair of commits,

<6> [405.838716] [IGT] i915_module_load: executing
<6> [405.841651] [IGT] i915_module_load: starting subtest reload
<4> [408.976245] snd_hda_intel 0000:00:1f.3: azx_get_response timeout, switching to polling mode: last cmd=0x202f8100
<4> [409.980171] snd_hda_intel 0000:00:1f.3: No response from codec, disabling MSI: last cmd=0x202f8100
<3> [410.985180] snd_hda_intel 0000:00:1f.3: azx_get_response timeout, switching to single_cmd mode: last cmd=0x202f8100
<3> [411.227736] snd_hda_codec_hdmi hdaudioC0D2: Unable to sync register 0x2f8100. -5
<7> [411.227849] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
<7> [411.227886] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
<7> [411.227917] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
<7> [411.227947] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
<7> [411.228004] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
<7> [411.228041] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
<7> [411.228077] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
<7> [411.228125] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
<7> [411.228160] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
<7> [411.228187] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
<7> [411.228214] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
<7> [411.228239] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
<7> [411.228265] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
<7> [411.228291] [drm:i915_audio_component_get_eld [i915]] Not valid for port F

Same error, but no delay. There's no telltale to determine if this is
during module unload or at the start of the next probe.
 
> Then it shows "Unable to sync register", which indicates the regcache
> sync at resume failed, followed by the ELD checks showing all
> negative.  So it's still all disconnected.  Maybe it's trying to poke
> the graphics side before the gfx initialization completed?

That should also be accompanied by lots of bad mmio warnings, and would
be very odd for:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6546/git-log-oneline.log
144ffb4c55b9 drm-tip: 2019y-07m-25d-05h-23m-02s UTC integration manifest
2756d9143aa5 ALSA: hda - Fix intermittent CORB/RIRB stall on Intel chips
a30f1743e4f5 ALSA: line6: sizeof (byte) is always 1, use that fact.
a6efe73f1e08 drm-tip: 2019y-07m-24d-10h-01m-04s UTC integration manifest

> After this error, the HDMI audio codec seems completely screwed up,
> and the probe of codec#2 always failed.
> 
> This loos pretty much like a timing related problem.

It got flagged as an issue because the reload test is suddenly hitting
the timeout.
-Chris


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