[Intel-gfx] [PATCH v2 2/5] drm/i915/uc: Move uC WOPCM setup in uc_init_hw

Chris Wilson chris at chris-wilson.co.uk
Wed Jul 31 09:05:45 UTC 2019


Quoting Michal Wajdeczko (2019-07-31 10:00:57)
> On Wed, 31 Jul 2019 01:07:40 +0200, Daniele Ceraolo Spurio  
> <daniele.ceraolospurio at intel.com> wrote:
> 
> > The register we write are not WOPCM regs but uC ones related to how
> > GuC and HuC are going to use the WOPCM, so it makes logical sense
> > for them to be programmed as part of uc_init_hw. The WOPCM map on the
> > other side is not uC-specific (although that is our main use-case), so
> > keep that separate.
> >
> > v2: move write_and_verify to uncore, fix log, re-use err_out tag,
> >     add intel_wopcm_guc_base, fix log
> >
> > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> > Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
> > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > ---
> 
> > --- a/drivers/gpu/drm/i915/intel_uncore.h
> > +++ b/drivers/gpu/drm/i915/intel_uncore.h
> > @@ -393,6 +393,18 @@ static inline void intel_uncore_rmw_fw(struct  
> > intel_uncore *uncore,
> >       intel_uncore_write_fw(uncore, reg, val);
> >  }
> > +static inline int intel_uncore_write_and_verify(struct intel_uncore  
> > *uncore,
> > +                                             i915_reg_t reg, u32 val,
> > +                                             u32 mask, u32 expected_val)
> > +{
> > +     u32 reg_val;
> > +
> > +     intel_uncore_write(uncore, reg, val);
> > +     reg_val = intel_uncore_read(uncore, reg);
> > +
> > +     return (reg_val & mask) != expected_val ? -EINVAL : 0;
> > +}
> 
> nit: I'm not sure that -EINVAL is the best choice (not sure about
> -ENODATA or -ENOKEY either) that's why I wanted to use bool ;)

ENXIO? It's a bridge we can cross later.
-Chris


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