[Intel-gfx] [PATCH v3 6/7] drm/i915/perf: allow holding preemption on filtered ctx

[Chris Wilson]

Quoting Lionel Landwerlin (2019-06-04 14:11:39)
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index ed19f4e53d31..4046f045408b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -683,6 +683,12 @@ static void port_assign(struct execlist_port *port, struct i915_request *rq)
>         if (port_isset(port))
>                 i915_request_put(port_request(port));
>  
> +       if (rq->has_perf) {
> +               rq->sched.attr.priority =
> +                       (I915_PRIORITY_MASK & rq->sched.attr.priority) |
> +                       I915_USER_PRIORITY(I915_PRIORITY_PERF);
> +       }

This is broken. You can not ignore PI here. If you bump the priority here you
must increase the priority of all of its cross-engine dependencies as
they may still be inflight and later reordered causing deadlocks. (Note
you cannot take the locks required for bumping other engines here.)
-Chris