[Intel-gfx] [PATCH] drm/i915/ehl: Update MOCS table for EHL

Matt Roper matthew.d.roper at intel.com
Sat Jun 15 15:23:32 UTC 2019


On Thu, Jun 13, 2019 at 03:27:04PM -0700, Souza, Jose wrote:
> On Thu, 2019-05-30 at 16:40 -0700, Matt Roper wrote:
> > EHL defines two new MOCS table entries but is otherwise compatible
> > with
> > the ICL MOCS table.
> > 
> > These table entries (16 and 17) should still be considered unused for
> > ICL and as such their behavior remains undefined for that platform.
> > 
> 
> Requesting another CI round before merging it.
> 
> Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

CI re-run looks clean; pushed to dinq.  Thanks for the reviews.


Matt


> 
> > Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_mocs.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
> > b/drivers/gpu/drm/i915/gt/intel_mocs.c
> > index 79df66022d3a..1f9db50b1869 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> > @@ -200,6 +200,14 @@ static const struct drm_i915_mocs_entry
> > broxton_mocs_table[] = {
> >  	MOCS_ENTRY(15, \
> >  		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(2) | LE_AOM(1), \
> >  		   L3_3_WB), \
> > +	/* Bypass LLC - Uncached (EHL+) */ \
> > +	MOCS_ENTRY(16, \
> > +		   LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
> > +		   L3_1_UC), \
> > +	/* Bypass LLC - L3 (Read-Only) (EHL+) */ \
> > +	MOCS_ENTRY(17, \
> > +		   LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
> > +		   L3_3_WB), \
> >  	/* Self-Snoop - L3 + LLC */ \
> >  	MOCS_ENTRY(18, \
> >  		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3) | LE_SSE(3), \

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795


More information about the Intel-gfx mailing list