[Intel-gfx] [PATCH 2/3] drm/i915/ehl: Remove unsupported cd clocks

[José Roberto de Souza]

EHL do not support 648 and 652.8 MHz.

BSpec: 20598
Cc: Clint Taylor <Clinton.A.Taylor at intel.com>
Cc: Matt Roper <matthew.d.roper at intel.com>
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index d560e25d3fb5..26c17ecf2083 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1754,7 +1754,8 @@ static void cnl_sanitize_cdclk(struct drm_i915_private *dev_priv)
 	dev_priv->cdclk.hw.vco = -1;
 }
 
-static int icl_calc_cdclk(int min_cdclk, unsigned int ref)
+static int icl_calc_cdclk(struct drm_i915_private *dev_priv, int min_cdclk,
+			  unsigned int ref)
 {
 	const int ranges_24[] = { 180000, 192000, 312000, 552000, 648000 };
 	const int ranges_19_38[] = { 172800, 192000, 307200, 556800, 652800 };
@@ -1776,6 +1777,12 @@ static int icl_calc_cdclk(int min_cdclk, unsigned int ref)
 		break;
 	}
 
+	/*
+	 * EHL do not support 648 and 652.8 MHz, so just decrement the len
+	 */
+	if (IS_ELKHARTLAKE(dev_priv))
+		len--;
+
 	for (i = 0; i < len; i++) {
 		if (min_cdclk <= ranges[i])
 			return ranges[i];
@@ -1954,7 +1961,8 @@ static void icl_init_cdclk(struct drm_i915_private *dev_priv)
 	DRM_DEBUG_KMS("Sanitizing cdclk programmed by pre-os\n");
 
 	sanitized_state.ref = dev_priv->cdclk.hw.ref;
-	sanitized_state.cdclk = icl_calc_cdclk(0, sanitized_state.ref);
+	sanitized_state.cdclk = icl_calc_cdclk(dev_priv, 0,
+					       sanitized_state.ref);
 	sanitized_state.vco = icl_calc_cdclk_pll_vco(dev_priv,
 						     sanitized_state.cdclk);
 	sanitized_state.voltage_level =
@@ -2554,7 +2562,7 @@ static int icl_modeset_calc_cdclk(struct intel_atomic_state *state)
 	if (min_cdclk < 0)
 		return min_cdclk;
 
-	cdclk = icl_calc_cdclk(min_cdclk, ref);
+	cdclk = icl_calc_cdclk(dev_priv, min_cdclk, ref);
 	vco = icl_calc_cdclk_pll_vco(dev_priv, cdclk);
 
 	state->cdclk.logical.vco = vco;
@@ -2564,7 +2572,8 @@ static int icl_modeset_calc_cdclk(struct intel_atomic_state *state)
 		    cnl_compute_min_voltage_level(state));
 
 	if (!state->active_crtcs) {
-		cdclk = icl_calc_cdclk(state->cdclk.force_min_cdclk, ref);
+		cdclk = icl_calc_cdclk(dev_priv, state->cdclk.force_min_cdclk,
+				       ref);
 		vco = icl_calc_cdclk_pll_vco(dev_priv, cdclk);
 
 		state->cdclk.actual.vco = vco;
-- 
2.22.0