[Intel-gfx] [PATCH v2 2/2] drm/i915/icl: whitelist PS_(DEPTH|INVOCATION)_COUNT

Lionel Landwerlin lionel.g.landwerlin at intel.com
Thu Jun 20 09:27:29 UTC 2019


The same tests failing on CFL+ platforms are also failing on ICL.
Documentation doesn't list the
WaAllowPMDepthAndInvocationCountAccessFromUMD workaround for ICL but
applying it fixes the same tests as CFL.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 367f5cc5965f..331a0050154d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1131,6 +1131,12 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)
 
 		/* WaEnableStateCacheRedirectToCS:icl */
 		whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
+
+		/* WaAllowPMDepthAndInvocationCountAccessFromUMD:icl */
+		whitelist_reg(w, PS_DEPTH_COUNT);
+		whitelist_reg(w, PS_DEPTH_COUNT_UDW);
+		whitelist_reg(w, PS_INVOCATION_COUNT);
+		whitelist_reg(w, PS_INVOCATION_COUNT_UDW);
 		break;
 
 	case VIDEO_DECODE_CLASS:
-- 
2.21.0.392.gf8f6787159e



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