[Intel-gfx] [PULL] drm-intel-fixes

Jani Nikula jani.nikula at intel.com
Thu Jun 20 12:13:22 UTC 2019


Hi Dave & Daniel -

drm-intel-fixes-2019-06-20:
drm/i915 fixes for v5.2-rc6:
- GVT: Fix reserved PVINFO register write (Weinan)
- Avoid clobbering M/N values in fastset fuzzy checks (Ville)

BR,
Jani.

The following changes since commit 9e0babf2c06c73cda2c0cd37a1653d823adb40ec:

  Linux 5.2-rc5 (2019-06-16 08:49:45 -1000)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2019-06-20

for you to fetch changes up to 475df5d0f3eb2d031e4505f84d8fba75baaf2e80:

  drm/i915: Don't clobber M/N values during fastset check (2019-06-19 15:57:09 +0300)

----------------------------------------------------------------
drm/i915 fixes for v5.2-rc6:
- GVT: Fix reserved PVINFO register write (Weinan)
- Avoid clobbering M/N values in fastset fuzzy checks (Ville)

----------------------------------------------------------------
Jani Nikula (1):
      Merge tag 'gvt-fixes-2019-06-19' of https://github.com/intel/gvt-linux into drm-intel-fixes

Ville Syrjälä (1):
      drm/i915: Don't clobber M/N values during fastset check

Weinan Li (1):
      drm/i915/gvt: ignore unexpected pvinfo write

 drivers/gpu/drm/i915/gvt/handlers.c  | 15 ++++++++------
 drivers/gpu/drm/i915/intel_display.c | 38 +++++++++++++++++++++++++++---------
 2 files changed, 38 insertions(+), 15 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


More information about the Intel-gfx mailing list