[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit

Patchwork patchwork at emeril.freedesktop.org
Mon Jun 24 06:39:43 UTC 2019


== Series Details ==

Series: series starting with [01/19] drm/i915/execlists: Always clear ring_pause if we do not submit
URL   : https://patchwork.freedesktop.org/series/62612/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/execlists: Always clear ring_pause if we do not submit
Okay!

Commit: drm/i915/execlists: Convert recursive defer_request() into an iteractive
Okay!

Commit: drm/i915/gt: Pass intel_gt to pm routines
Okay!

Commit: drm/i915/selftests: Serialise nop reset with retirement
Okay!

Commit: drm/i915/selftest: Drop manual request wakerefs around hangcheck
Okay!

Commit: drm/i915/selftests: Fixup atomic reset checking
Okay!

Commit: drm/i915: Rename intel_wakeref_[is]_active
+./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)

Commit: drm/i915: Add a wakeref getter for iff the wakeref is already active
Okay!

Commit: drm/i915: Only recover active engines
Okay!

Commit: drm/i915: Lift intel_engines_resume() to callers
Okay!

Commit: drm/i915: Teach execbuffer to take the engine wakeref not GT
Okay!

Commit: drm/i915/gt: Track timeline activeness in enter/exit
Okay!

Commit: drm/i915/gt: Convert timeline tracking to spinlock
Okay!

Commit: drm/i915/gt: Guard timeline pinning with its own mutex
Okay!

Commit: drm/i915/selftests: Hold ref on request across waits
Okay!

Commit: drm/i915/gt: Always call kref_init for the timeline
Okay!

Commit: drm/i915/gt: Drop stale commentary for timeline density
Okay!

Commit: drm/i915: Protect request retirement with timeline->mutex
Okay!

Commit: drm/i915: Replace struct_mutex for batch pool serialisation
+./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)



More information about the Intel-gfx mailing list