[Intel-gfx] [PATCH] drm/i915/gem: Clear read/write domains for GPU clear

Matthew Auld matthew.auld at intel.com
Mon Jun 24 15:50:48 UTC 2019


On 24/06/2019 15:16, Chris Wilson wrote:
> Update the domains for the write via the GPU so that we do not
> shortcircuit any set-domain wait afterwards.

I'm lost. How do we short-circuit the set-domain wait?

> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110978
> Fixes: b2dbf8d982a4 ("drm/i915/blt: Remove recursive vma->lock")
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld at intel.com>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_client_blt.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
> index 9b01c3b5b31d..6f537e8e4dea 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_client_blt.c
> @@ -162,11 +162,12 @@ static void clear_pages_worker(struct work_struct *work)
>   		goto out_signal;
>   
>   	if (obj->cache_dirty) {
> -		obj->write_domain = 0;
>   		if (i915_gem_object_has_struct_page(obj))
>   			drm_clflush_sg(w->sleeve->pages);
>   		obj->cache_dirty = false;
>   	}
> +	obj->read_domains = I915_GEM_GPU_DOMAINS;
> +	obj->write_domain = 0;
>   
>   	/* XXX: we need to kill this */
>   	mutex_lock(&i915->drm.struct_mutex);
> 


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