[Intel-gfx] [PATCH v3 7/8] drm/i915/display/icl: Disable transcoder port sync as part of crtc_disable() sequence

[Manasi Navare]

This clears the transcoder port sync bits of the TRANS_DDI_FUNC_CTL2
register during crtc_disable().

Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
Cc: Matt Roper <matthew.d.roper at intel.com>
Cc: Jani Nikula <jani.nikula at intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 44 ++++++++++++++++----
 1 file changed, 35 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f88d3a929e36..0a0d97ef03d6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4427,6 +4427,26 @@ static void icl_enable_trans_port_sync(struct intel_atomic_state *old_intel_stat
 		   trans_ddi_func_ctl2_val);
 }
 
+static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_crtc_state)
+{
+	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	i915_reg_t reg;
+	u32 trans_ddi_func_ctl2_val;
+
+	if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
+		return;
+
+	DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
+		      transcoder_name(old_crtc_state->cpu_transcoder));
+
+	reg = TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder);
+	trans_ddi_func_ctl2_val = I915_READ(reg);
+	trans_ddi_func_ctl2_val &= ~(PORT_SYNC_MODE_ENABLE |
+				     PORT_SYNC_MODE_MASTER_SELECT_MASK);
+	I915_WRITE(reg, trans_ddi_func_ctl2_val);
+}
+
 static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_state,
 				     const struct intel_crtc_state *new_crtc_state)
 {
@@ -6586,6 +6606,9 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
 	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST))
 		intel_ddi_set_vc_payload_alloc(old_crtc_state, false);
 
+	if (INTEL_GEN(dev_priv) >= 11)
+		icl_disable_transcoder_port_sync(old_crtc_state);
+
 	if (!transcoder_is_dsi(cpu_transcoder))
 		intel_ddi_disable_transcoder_func(old_crtc_state);
 
@@ -10317,18 +10340,21 @@ static void icelake_get_trans_port_sync_config(struct intel_crtc *crtc,
 			pipe_config->master_transcoder = TRANSCODER_EDP;
 			break;
 		}
-	} else
+
+		pipe_config->sync_mode_slaves_mask = 0;
+	} else {
 		pipe_config->master_transcoder = INVALID_TRANSCODER;
 
-	transcoders = BIT(TRANSCODER_EDP) |
-		BIT(TRANSCODER_A) |
-		BIT(TRANSCODER_B) |
-		BIT(TRANSCODER_C);
-	for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
-		trans_port_sync = I915_READ(TRANS_DDI_FUNC_CTL2(cpu_transcoder));
+		transcoders = BIT(TRANSCODER_EDP) |
+			BIT(TRANSCODER_A) |
+			BIT(TRANSCODER_B) |
+			BIT(TRANSCODER_C);
+		for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
+			trans_port_sync = I915_READ(TRANS_DDI_FUNC_CTL2(cpu_transcoder));
 
-		if (trans_port_sync & PORT_SYNC_MODE_ENABLE)
-			pipe_config->sync_mode_slaves_mask |= BIT(cpu_transcoder);
+			if (trans_port_sync & PORT_SYNC_MODE_ENABLE)
+				pipe_config->sync_mode_slaves_mask |= BIT(cpu_transcoder);
+		}
 	}
 }
 
-- 
2.19.1