[Intel-gfx] [PATCH 09/28] drm/i915/tgl: Check if pipe D is fused
Srivatsa, Anusha
anusha.srivatsa at intel.com
Wed Jun 26 21:24:11 UTC 2019
>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of
>Lucas De Marchi
>Sent: Tuesday, June 25, 2019 10:54 AM
>To: intel-gfx at lists.freedesktop.org
>Cc: De Marchi, Lucas <lucas.demarchi at intel.com>
>Subject: [Intel-gfx] [PATCH 09/28] drm/i915/tgl: Check if pipe D is fused
>
>From: José Roberto de Souza <jose.souza at intel.com>
>
>On Tiger Lake there is one more pipe - check if it's fused.
>
>Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> 2 files changed, 4 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index a63a337eec2c..95fdc8dbca31 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -7618,6 +7618,7 @@ enum {
> #define SKL_DFSM_PIPE_A_DISABLE (1 << 30)
> #define SKL_DFSM_PIPE_B_DISABLE (1 << 21)
> #define SKL_DFSM_PIPE_C_DISABLE (1 << 28)
>+#define TGL_DFSM_PIPE_D_DISABLE (1 << 22)
>
> #define SKL_DSSM _MMIO(0x51004)
> #define CNL_DSSM_CDCLK_PLL_REFCLK_24MHz (1 << 31)
>diff --git a/drivers/gpu/drm/i915/intel_device_info.c
>b/drivers/gpu/drm/i915/intel_device_info.c
>index e0d9a7a37994..f99c9fd497b2 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.c
>+++ b/drivers/gpu/drm/i915/intel_device_info.c
>@@ -938,6 +938,9 @@ void intel_device_info_runtime_init(struct
>drm_i915_private *dev_priv)
> enabled_mask &= ~BIT(PIPE_B);
> if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
> enabled_mask &= ~BIT(PIPE_C);
>+ if (INTEL_GEN(dev_priv) >= 12 &&
>+ (dfsm & TGL_DFSM_PIPE_D_DISABLE))
>+ enabled_mask &= ~BIT(PIPE_D);
>
> /*
> * At least one pipe should be enabled and if there are
>--
>2.21.0
>
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