[Intel-gfx] [PATCH v6 2/3] drm/i915: whitelist PS_(DEPTH|INVOCATION)_COUNT

Lionel Landwerlin lionel.g.landwerlin at intel.com
Thu Jun 27 23:53:09 UTC 2019


On 27/06/2019 14:53, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2019-06-27 10:01:15)
>> CFL:C0+ changed the status of those registers which are now
>> blacklisted by default.
>>
>> This is breaking a number of CTS tests on GL & Vulkan :
>>
>>    KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations (GL)
>>
>>    dEQP-VK.query_pool.statistics_query.fragment_shader_invocations.* (Vulkan)
>>
>> v2: Only use one whitelist entry (Lionel)
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/intel_workarounds.c | 17 ++++++++++++++++-
>>   1 file changed, 16 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> index 993804d09517..b117583e38bb 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> @@ -1092,10 +1092,25 @@ static void glk_whitelist_build(struct intel_engine_cs *engine)
>>   
>>   static void cfl_whitelist_build(struct intel_engine_cs *engine)
>>   {
>> +       struct i915_wa_list *w = &engine->whitelist;
>> +
>>          if (engine->class != RENDER_CLASS)
>>                  return;
>>   
>> -       gen9_whitelist_build(&engine->whitelist);
>> +       gen9_whitelist_build(w);
>> +
>> +       /*
>> +        * WaAllowPMDepthAndInvocationCountAccessFromUMD:cfl,whl,cml,aml
>> +        *
>> +        * This covers 4 register which are next to one another :
>> +        *   - PS_INVOCATION_COUNT
>> +        *   - PS_INVOCATION_COUNT_UDW
>> +        *   - PS_DEPTH_COUNT
>> +        *   - PS_DEPTH_COUNT_UDW
>> +        */
>> +       whitelist_reg_ext(w, PS_INVOCATION_COUNT,
>> +                         RING_FORCE_TO_NONPRIV_RD |
>> +                         RING_FORCE_TO_NONPRIV_RANGE_4);
> Magic! As we can't rely on our selftests to verify that this allows
> access from user batches, could you poke Anuj for another tested by?
> -Chris
>
I'll let Anuj answer.

Do I need Cc: stable at vger.kernel.org ?


-Lionel



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