[Intel-gfx] [PATCH 2/2] drm/i915: allow platforms without eDP transcoder

[Lucas De Marchi]

On Mon, Feb 25, 2019 at 06:17:13AM -0800, Mika Kahola wrote:
>Looks allright.
>
>On Fri, 2019-02-22 at 15:02 -0800, Lucas De Marchi wrote:
>> Define a HAS_TRANSCODER_EDP() macro that checks if we have defined an
>> offset for this transcoder. This allows platforms to be defined
>> without
>> eDP transcoder.
>>
>> Cc: Mika Kahola <mika.kahola at intel.com>
>> Cc: Imre Deak <imre.deak at intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
>
>Reviewed-by: Mika Kahola <mika.kahola at intel.com>

humn.. this depends on the first patch. Is this r-b for both?

Lucas De Marchi

>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h      | 1 +
>>  drivers/gpu/drm/i915/intel_ddi.c     | 6 +++---
>>  drivers/gpu/drm/i915/intel_display.c | 5 ++++-
>>  3 files changed, 8 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index cc09caf3870e..a8e9f0cf20f5 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2519,6 +2519,7 @@ static inline unsigned int
>> i915_sg_segment_size(void)
>>  #define HAS_DDI(dev_priv)		 (INTEL_INFO(dev_priv)-
>> >display.has_ddi)
>>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
>> >has_fpga_dbg)
>>  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)-
>> >display.has_psr)
>> +#define HAS_TRANSCODER_EDP(dev_priv)	 (INTEL_INFO(dev_priv)-
>> >trans_offsets[TRANSCODER_EDP] != 0)
>>
>>  #define HAS_RC6(dev_priv)		 (INTEL_INFO(dev_priv)-
>> >has_rc6)
>>  #define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)-
>> >has_rc6p)
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>> b/drivers/gpu/drm/i915/intel_ddi.c
>> index ea83071a22c4..8eeffa027b74 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -1911,7 +1911,7 @@ bool intel_ddi_connector_get_hw_state(struct
>> intel_connector *intel_connector)
>>  		goto out;
>>  	}
>>
>> -	if (port == PORT_A)
>> +	if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
>>  		cpu_transcoder = TRANSCODER_EDP;
>>  	else
>>  		cpu_transcoder = (enum transcoder) pipe;
>> @@ -1973,7 +1973,7 @@ static void intel_ddi_get_encoder_pipes(struct
>> intel_encoder *encoder,
>>  	if (!(tmp & DDI_BUF_CTL_ENABLE))
>>  		goto out;
>>
>> -	if (port == PORT_A) {
>> +	if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
>>  		tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
>>
>>  		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
>> @@ -3856,7 +3856,7 @@ static int intel_ddi_compute_config(struct
>> intel_encoder *encoder,
>>  	enum port port = encoder->port;
>>  	int ret;
>>
>> -	if (port == PORT_A)
>> +	if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
>>  		pipe_config->cpu_transcoder = TRANSCODER_EDP;
>>
>>  	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 9dfb99195144..8bf4bdf2006a 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -9688,7 +9688,7 @@ static bool hsw_get_transcoder_state(struct
>> intel_crtc *crtc,
>>  	struct drm_device *dev = crtc->base.dev;
>>  	struct drm_i915_private *dev_priv = to_i915(dev);
>>  	enum intel_display_power_domain power_domain;
>> -	unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
>> +	unsigned long panel_transcoder_mask = 0;
>>  	unsigned long enabled_panel_transcoders = 0;
>>  	enum transcoder panel_transcoder;
>>  	u32 tmp;
>> @@ -9697,6 +9697,9 @@ static bool hsw_get_transcoder_state(struct
>> intel_crtc *crtc,
>>  		panel_transcoder_mask |=
>>  			BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
>>
>> +	if (HAS_TRANSCODER_EDP(dev_priv))
>> +		panel_transcoder_mask |= BIT(TRANSCODER_EDP);
>> +
>>  	/*
>>  	 * The pipe->transcoder mapping is fixed with the exception of
>> the eDP
>>  	 * and DSI transcoders handled below.