[Intel-gfx] [PATCH 01/13] drm/i915: Don't pass crtc to intel_find_shared_dpll()

[Lucas De Marchi]

On Thu, Feb 7, 2019 at 9:32 AM Ville Syrjala
<ville.syrjala at linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Passing both crtc and its state is redundant. Pass just the state.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

for the series.

Lucas De Marchi

> ---
>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 0a42d11c4c33..1d1a2c456257 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -241,11 +241,11 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
>  }
>
>  static struct intel_shared_dpll *
> -intel_find_shared_dpll(struct intel_crtc *crtc,
> -                      struct intel_crtc_state *crtc_state,
> +intel_find_shared_dpll(struct intel_crtc_state *crtc_state,
>                        enum intel_dpll_id range_min,
>                        enum intel_dpll_id range_max)
>  {
> +       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>         struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         struct intel_shared_dpll *pll, *unused_pll = NULL;
>         struct intel_shared_dpll_state *shared_dpll;
> @@ -436,7 +436,7 @@ ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
>                               crtc->base.base.id, crtc->base.name,
>                               pll->info->name);
>         } else {
> -               pll = intel_find_shared_dpll(crtc, crtc_state,
> +               pll = intel_find_shared_dpll(crtc_state,
>                                              DPLL_ID_PCH_PLL_A,
>                                              DPLL_ID_PCH_PLL_B);
>         }
> @@ -780,7 +780,7 @@ static struct intel_shared_dpll *hsw_ddi_hdmi_get_dpll(int clock,
>
>         crtc_state->dpll_hw_state.wrpll = val;
>
> -       pll = intel_find_shared_dpll(crtc, crtc_state,
> +       pll = intel_find_shared_dpll(crtc_state,
>                                      DPLL_ID_WRPLL1, DPLL_ID_WRPLL2);
>
>         if (!pll)
> @@ -840,7 +840,7 @@ hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
>                 crtc_state->dpll_hw_state.spll =
>                         SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC;
>
> -               pll = intel_find_shared_dpll(crtc, crtc_state,
> +               pll = intel_find_shared_dpll(crtc_state,
>                                              DPLL_ID_SPLL, DPLL_ID_SPLL);
>         } else {
>                 return NULL;
> @@ -1411,11 +1411,11 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
>         }
>
>         if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> -               pll = intel_find_shared_dpll(crtc, crtc_state,
> +               pll = intel_find_shared_dpll(crtc_state,
>                                              DPLL_ID_SKL_DPLL0,
>                                              DPLL_ID_SKL_DPLL0);
>         else
> -               pll = intel_find_shared_dpll(crtc, crtc_state,
> +               pll = intel_find_shared_dpll(crtc_state,
>                                              DPLL_ID_SKL_DPLL1,
>                                              DPLL_ID_SKL_DPLL3);
>         if (!pll)
> @@ -2390,7 +2390,7 @@ cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
>                 return NULL;
>         }
>
> -       pll = intel_find_shared_dpll(crtc, crtc_state,
> +       pll = intel_find_shared_dpll(crtc_state,
>                                      DPLL_ID_SKL_DPLL0,
>                                      DPLL_ID_SKL_DPLL2);
>         if (!pll) {
> @@ -2945,7 +2945,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
>
>         crtc_state->dpll_hw_state = pll_state;
>
> -       pll = intel_find_shared_dpll(crtc, crtc_state, min, max);
> +       pll = intel_find_shared_dpll(crtc_state, min, max);
>         if (!pll) {
>                 DRM_DEBUG_KMS("No PLL selected\n");
>                 return NULL;
> --
> 2.19.2
>
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-- 
Lucas De Marchi