[Intel-gfx] [PATCH 1/2] drm/i915: Fix bit name in PP_STATUS register

[Ville Syrjälä]

On Fri, Mar 01, 2019 at 05:14:04PM -0800, Lucas De Marchi wrote:
> According to the spec PP_SEQUENCE_STATE_ON_S1_1 is the correct name, so
> just rename it.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c9b482bc6433..c9b868347481 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4723,7 +4723,7 @@ enum {
>  #define   PP_SEQUENCE_STATE_OFF_S0_2	(0x2 << 0)
>  #define   PP_SEQUENCE_STATE_OFF_S0_3	(0x3 << 0)
>  #define   PP_SEQUENCE_STATE_ON_IDLE	(0x8 << 0)
> -#define   PP_SEQUENCE_STATE_ON_S1_0	(0x9 << 0)
> +#define   PP_SEQUENCE_STATE_ON_S1_1	(0x9 << 0)
>  #define   PP_SEQUENCE_STATE_ON_S1_2	(0xa << 0)
>  #define   PP_SEQUENCE_STATE_ON_S1_3	(0xb << 0)
>  #define   PP_SEQUENCE_STATE_RESET	(0xf << 0)
> -- 
> 2.20.1

-- 
Ville Syrjälä
Intel