[Intel-gfx] [PATCH 10/13] drm/i915: Load balancing across a virtual engine

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-03-12 07:52:08)
> 
> On 08/03/2019 14:12, Chris Wilson wrote:
> > +static int
> > +set_engines__load_balance(struct i915_user_extension __user *base, void *data)
> > +{
> > +     struct i915_context_engines_load_balance __user *ext =
> > +             container_of_user(base, typeof(*ext), base);
> > +     const struct set_engines *set = data;
> > +     struct intel_engine_cs *ve;
> > +     unsigned int n;
> > +     u64 mask;
> > +     u16 idx;
> > +     int err;
> > +
> > +     if (!HAS_EXECLISTS(set->ctx->i915))
> > +             return -ENODEV;
> > +
> > +     if (USES_GUC_SUBMISSION(set->ctx->i915))
> > +             return -ENODEV; /* not implement yet */
> 
> Didn't it used to be that you were checking for single timeline flag 
> somewhere around here? Now you allow multi-timeline map with a virtual 
> engine slot?

Yes, on reflection I decided that was overly prescriptive. If userspace
wants to create a context with a mixed setup of veng and normal engines,
it can choose whether or not they are a single timeline or setup. The
recommendation is that they share a timeline as that's is more likely to
match their client API.
-Chris