[Intel-gfx] [PATCH 7/9] drm/i915/ehl: Set proper eu slice/subslice parameters for EHL

[Lucas De Marchi]

On Wed, Mar 13, 2019 at 02:11:42PM -0700, Rodrigo Vivi wrote:
>From: Bob Paauwe <bob.j.paauwe at intel.com>
>
>EHL has a different number of subslices.
>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Signed-off-by: Bob Paauwe <bob.j.paauwe at intel.com>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>---
> drivers/gpu/drm/i915/intel_device_info.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>index c8c0f4134bdb..31411f1cdbb4 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.c
>+++ b/drivers/gpu/drm/i915/intel_device_info.c
>@@ -156,9 +156,15 @@ static void gen11_sseu_info_init(struct drm_i915_private *dev_priv)
> 	u8 eu_en;
> 	int s;
>
>-	sseu->max_slices = 1;
>-	sseu->max_subslices = 8;
>-	sseu->max_eus_per_subslice = 8;
>+	if (IS_ELKHARTLAKE(dev_priv)) {
>+		sseu->max_slices = 1;
>+		sseu->max_subslices = 4;
>+		sseu->max_eus_per_subslice = 8;

matches spec.


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>+	} else {
>+		sseu->max_slices = 1;
>+		sseu->max_subslices = 8;
>+		sseu->max_eus_per_subslice = 8;
>+	}
>
> 	s_en = I915_READ(GEN11_GT_SLICE_ENABLE) & GEN11_GT_S_ENA_MASK;
> 	ss_en = ~I915_READ(GEN11_GT_SUBSLICE_DISABLE);
>-- 
>2.20.1
>