[Intel-gfx] [PATCH] drm/i915: Add not fenceable reason to not enable FBC

[José Roberto de Souza]

There is some kms_frontbuffer_tracking failures due FBC being
disabled with the reason "framebuffer not tiled or fenced".
Although the test is setting up everything correctly to have
FBC enabled sporadically it is failing, due the alignment and size
restrictions in __i915_vma_set_map_and_fenceable().

So lets add another FBC failure reason and skip tests when that is
set and keep "framebuffer not tiled or fenced" as error as it
indicates that buffer is not tiled due wrong setup of the test.

Also fixing close typos.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108040
Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 656e684e7c9a..2980a3b579e0 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -726,19 +726,30 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 	 * by the CPU to the scanout and trigger updates to the FBC.
 	 *
 	 * Note that is possible for a tiled surface to be unmappable (and
-	 * so have no fence associated with it) due to aperture constaints
+	 * so have no fence associated with it) due to aperture constraints
 	 * at the time of pinning.
 	 *
 	 * FIXME with 90/270 degree rotation we should use the fence on
 	 * the normal GTT view (the rotated view doesn't even have a
 	 * fence). Would need changes to the FBC fence Y offset as well.
-	 * For now this will effecively disable FBC with 90/270 degree
+	 * For now this will effectively disable FBC with 90/270 degree
 	 * rotation.
 	 */
+	if (!(cache->vma->flags & I915_VMA_CAN_FENCE)) {
+		/* Requirements not meet see __i915_vma_set_map_and_fenceable() */
+		fbc->no_fbc_reason = "framebuffer is not fenceable";
+		return false;
+	}
+
 	if (!(cache->flags & PLANE_HAS_FENCE)) {
+		/*
+		 * If framebuffer can have fence but don't has it, it is
+		 * because buffer is not tiled.
+		 */
 		fbc->no_fbc_reason = "framebuffer not tiled or fenced";
 		return false;
 	}
+
 	if (INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv) &&
 	    cache->plane.rotation != DRM_MODE_ROTATE_0) {
 		fbc->no_fbc_reason = "rotation unsupported";
-- 
2.21.0