[Intel-gfx] [PATCH 1/2] drm/i915: Fix GCMAX color register programming

[Ville Syrjälä]

On Fri, Mar 29, 2019 at 06:19:18PM +0530, Uma Shankar wrote:
> GC MAX register is used to program values from 1.0 to
> less than 3.0. A different register was used instead of
> the intended one. Fixed the same.
> 
> Currently limiting it to 1.0 due to ABI limitations.
> 
> Reported-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Uma Shankar <uma.shankar at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_color.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
> index ff910ed..dd179a8 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -518,14 +518,14 @@ static void bdw_load_gamma_lut(const struct intel_crtc_state *crtc_state, u32 of
>  			I915_WRITE(PREC_PAL_DATA(pipe), word);
>  		}
>  
> -		/* Program the max register to clamp values > 1.0. */
> -		i = lut_size - 1;
> -		I915_WRITE(PREC_PAL_GC_MAX(pipe, 0),
> -			   drm_color_lut_extract(lut[i].red, 16));
> -		I915_WRITE(PREC_PAL_GC_MAX(pipe, 1),
> -			   drm_color_lut_extract(lut[i].green, 16));
> -		I915_WRITE(PREC_PAL_GC_MAX(pipe, 2),
> -			   drm_color_lut_extract(lut[i].blue, 16));
> +		/*
> +		 * Program the max register to clamp values > 1.0.
> +		 * ToDo: Extend the ABI to be able to program values
> +		 * from 1.0 to 3.0
> +		 */
> +		I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 0), (1 << 16) - 1);
> +		I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 1), (1 << 16) - 1);
> +		I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 2), (1 << 16) - 1);

Maybe we want these to be just 1<<16 to match how we set up the glk+
degamma?

>  	} else {
>  		for (i = 0; i < lut_size; i++) {
>  			u32 v = (i * ((1 << 10) - 1)) / (lut_size - 1);
> @@ -534,9 +534,9 @@ static void bdw_load_gamma_lut(const struct intel_crtc_state *crtc_state, u32 of
>  				   (v << 20) | (v << 10) | v);
>  		}
>  
> -		I915_WRITE(PREC_PAL_GC_MAX(pipe, 0), (1 << 16) - 1);
> -		I915_WRITE(PREC_PAL_GC_MAX(pipe, 1), (1 << 16) - 1);
> -		I915_WRITE(PREC_PAL_GC_MAX(pipe, 2), (1 << 16) - 1);
> +		I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 0), (1 << 16) - 1);
> +		I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 1), (1 << 16) - 1);
> +		I915_WRITE(PREC_PAL_EXT_GC_MAX(pipe, 2), (1 << 16) - 1);
>  	}
>  
>  	/*
> -- 
> 1.9.1
> 
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-- 
Ville Syrjälä
Intel