[Intel-gfx] [PATCH v4 4/8] drm/i915: vgpu context submission pv optimization

[Chris Wilson]

Quoting Xiaolin Zhang (2019-03-29 13:32:40)
> +       spin_lock(&engine->i915->vgpu.shared_page_lock);
> +       shared_page->ring_id = engine->id;
> +       for (n = 0; n < execlists_num_ports(execlists); n++)
> +               shared_page->descs[n] = descs[n];
> +
> +       __raw_i915_write32(uncore, vgtif_reg(g2v_notify),
> +                       VGT_G2V_PV_SUBMISSION);

There's no serialisation with the consumer here. The
shared_page->descs[] will be clobbered by a second engine before they
are read by pv. There should be a wait-for-ack here, or separate
channels for each engine. In execlists, we avoid this by not dequeuing
until after we get a response/ack from HW.

Preemption? I guess preemption was turned off, or else you have to worry
about the same engine overwriting the desc[] (if no ack).
-Chris