[Intel-gfx] [PATCH 2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible

[Shankar, Uma]

>-----Original Message-----
>From: Ville Syrjala [mailto:ville.syrjala at linux.intel.com]
>Sent: Friday, May 3, 2019 1:36 AM
>To: intel-gfx at lists.freedesktop.org
>Cc: Shankar, Uma <uma.shankar at intel.com>; Sharma, Shashank
><shashank.sharma at intel.com>
>Subject: [PATCH 2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible
>
>From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
>Turns out the cursor is compatible with the pipe "HDR mode". It's only the actual SDR
>planes that get entirely bypassed during blending. So let's ignore the cursor when
>checking if we have any planes active that aren't HDR compatible. This fixes the
>regressions in the kms_cursor_crc and kms_plane_cursor tests.

Checked for details around this in spec, couldn't get anything specific around how cursor
behaves wrt HDR_MODE. But with the test results it appears that they do follow the HDR
precision. With this observation and data, change looks ok.

Reviewed-by: Uma Shankar <uma.shankar at intel.com>

>Cc: Uma Shankar <uma.shankar at intel.com>
>Cc: Shashank Sharma <shashank.sharma at intel.com>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110579
>Fixes: 09b25812db10 ("drm/i915: Enable pipe HDR mode on ICL if only HDR planes are
>used")
>Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>---
> drivers/gpu/drm/i915/intel_display.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c
>b/drivers/gpu/drm/i915/intel_display.c
>index 28042a16084d..cc1203901ef4 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -8927,7 +8927,8 @@ static void bdw_set_pipemisc(const struct intel_crtc_state
>*crtc_state)
> 			PIPEMISC_YUV420_MODE_FULL_BLEND;
>
> 	if (INTEL_GEN(dev_priv) >= 11 &&
>-	    (crtc_state->active_planes & ~icl_hdr_plane_mask()) == 0)
>+	    (crtc_state->active_planes & ~(icl_hdr_plane_mask() |
>+					   BIT(PLANE_CURSOR))) == 0)
> 		val |= PIPEMISC_HDR_MODE_PRECISION;
>
> 	I915_WRITE(PIPEMISC(crtc->pipe), val);
>--
>2.21.0