[Intel-gfx] [PATCH 2/3] drm/i915/icl: Fix Y pre-offset for Full Range YCbCr
Uma Shankar
uma.shankar at intel.com
Thu May 9 19:11:47 UTC 2019
Fixed Y Pre-offset in case of Full Range YCbCr.
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar at intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 4f513600..c9c970f 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -505,8 +505,11 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
I915_WRITE_FW(PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 0),
PREOFF_YUV_TO_RGB_HI);
- I915_WRITE_FW(PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1),
- PREOFF_YUV_TO_RGB_ME);
+ if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
+ I915_WRITE_FW(PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1), 0);
+ else
+ I915_WRITE_FW(PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 1),
+ PREOFF_YUV_TO_RGB_ME);
I915_WRITE_FW(PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 2),
PREOFF_YUV_TO_RGB_LO);
I915_WRITE_FW(PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 0), 0x0);
--
1.9.1
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