[Intel-gfx] [PATCH] drm/i915/gen11: enable support for headerless msgs

Chris Wilson chris at chris-wilson.co.uk
Fri May 24 09:07:46 UTC 2019


Quoting Mika Kuoppala (2019-05-24 09:03:00)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > From: Dongwon Kim <dongwon.kim at intel.com>
> >
> > Setting bit5 (headerless msg for preemptable GPGPU context) of SAMPLER_MODE
> > register to enable support for the headless msgs on gen11. None of existing
> > use cases will be affected by this as this change makes both types of message
> > - headerless and w/ header supported at the same time. It also complies with
> > the new recommendation for the default bit value for the next gen.
> >
> > v2: rewrote commit message to include more information
> > v3: setting the bit in icl_ctx_workarounds_init()
> >
> > Signed-off-by: Dongwon Kim <dongwon.kim at intel.com>
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

And pushed. Thanks for the patch and review,
-Chris


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