[Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx
Lionel Landwerlin
lionel.g.landwerlin at intel.com
Fri May 24 09:28:16 UTC 2019
On 21/05/2019 17:36, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2019-05-21 15:08:52)
>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
>> index f263a8374273..2ad95977f7a8 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
>> @@ -2085,7 +2085,7 @@ static int gen9_emit_bb_start(struct i915_request *rq,
>> if (IS_ERR(cs))
>> return PTR_ERR(cs);
>>
>> - *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
>> + *cs++ = MI_ARB_ON_OFF | rq->hw_context->arb_enable;
> My prediction is that this will result in this context being reset due
> to preemption timeouts and the context under profile being banned. Note
> that preemption timeouts will be the primary means for hang detection
> for endless batches.
> -Chris
>
Another thought :
What if we ran with the max priority?
It would be fine to have the hangcheck preempt the workload (it's pretty
short and shouldn't affect perf counters from 3d/compute pipeline much)
as long as ensure nothing else runs.
-Lionel
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