[Intel-gfx] [PATCH] drm/i915/icl: Ensure port A combo PHY HW state is correct

[Ville Syrjälä]

On Fri, May 31, 2019 at 11:26:26AM +0300, Imre Deak wrote:
> Make sure the HW state of the port A combo PHY is correct wrt. the
> IREFGEN setting. This will force a reprogramming during init or a WARN
> during uninit if the setting is incorrect.
> 
> On my ICL RVP I haven't seen this check failing and leading to a forced
> reinit/WARN, but let's add it still for consistency.
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak at intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_combo_phy.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c b/drivers/gpu/drm/i915/intel_combo_phy.c
> index 98213cc58736..841708da5a56 100644
> --- a/drivers/gpu/drm/i915/intel_combo_phy.c
> +++ b/drivers/gpu/drm/i915/intel_combo_phy.c
> @@ -198,6 +198,10 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
>  
>  	ret = cnl_verify_procmon_ref_values(dev_priv, port);
>  
> +	if (port == PORT_A)
> +		ret &= check_phy_reg(dev_priv, port, ICL_PORT_COMP_DW8(port),
> +				     IREFGEN, IREFGEN);
> +
>  	ret &= check_phy_reg(dev_priv, port, ICL_PORT_CL_DW5(port),
>  			     CL_POWER_DOWN_ENABLE, CL_POWER_DOWN_ENABLE);
>  
> -- 
> 2.17.1

-- 
Ville Syrjälä
Intel