[Intel-gfx] [PATCH v3] drm/i915: update rawclk also on resume

[Jani Nikula]

On Sat, 02 Nov 2019, Lee Shawn C <shawn.c.lee at intel.com> wrote:
> Since CNP it's possible for rawclk to have two different values, 19.2
> and 24 MHz. If the value indicated by SFUSE_STRAP register is different
> from the power on default for PCH_RAWCLK_FREQ, we'll end up having a
> mismatch between the rawclk hardware and software states after
> suspend/resume. On previous platforms this used to work by accident,
> because the power on defaults worked just fine.
>
> Update the rawclk also on resume. The natural place to do this is
> intel_modeset_init_hw(), however VLV/CHV need it done before
> intel_power_domains_init_hw(). Split the update accordingly, even if
> that's slighly ugly. This means moving the update later for non-VLV/CHV
> platforms in probe.
>
> v2: Do intel_update_rawclk() at intel_power_domains_init_hw(). Rawclk will
> be configured with proper setting and executed before intel_modeset_init_hw().
> v3: Update code base to latest to fix git merge failed.
>
> Reported-by: Shawn Lee <shawn.c.lee at intel.com>
> Cc: Shawn Lee <shawn.c.lee at intel.com>
> Cc: Ville Syrjala <ville.syrjala at linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> Signed-off-by: Lee Shawn C <shawn.c.lee at intel.com>

Please don't change the authorship of patches when you make new versions
of them, especially so if the changes are neglible. 90% of the work in
the original was writing the commit message, and here the commit message
no longer matches the actual change.

My v2 of the patch is [1].

BR,
Jani.


[1] http://patchwork.freedesktop.org/patch/msgid/20191101142024.13877-1-jani.nikula@intel.com


> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++++
>  drivers/gpu/drm/i915/i915_drv.c                    | 3 ---
>  2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 707ac110e271..21a95d181a20 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -5015,6 +5015,12 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
>  
>  	power_domains->initializing = true;
>  
> +	/*
> +	 * Must happen before power domain init on VLV/CHV, the rest update
> +	 * rawclk can be done here as well.
> +	 */
> +	intel_update_rawclk(i915);
> +
>  	if (INTEL_GEN(i915) >= 11) {
>  		icl_display_core_init(i915, resume);
>  	} else if (IS_CANNONLAKE(i915)) {
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 480e2054f628..b26b4457339c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -296,9 +296,6 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
>  	if (ret)
>  		goto cleanup_vga_client;
>  
> -	/* must happen before intel_power_domains_init_hw() on VLV/CHV */
> -	intel_update_rawclk(i915);
> -
>  	intel_power_domains_init_hw(i915, false);
>  
>  	intel_csr_ucode_init(i915);

-- 
Jani Nikula, Intel Open Source Graphics Center