[Intel-gfx] [PATCH] drm/i915: Leave the aliasing-ppgtt size alone
Chris Wilson
chris at chris-wilson.co.uk
Thu Nov 7 08:35:34 UTC 2019
Quoting Mika Kuoppala (2019-11-07 08:32:47)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
>
> > The hidden aliasing-ppgtt's size is never revealed, as we only inspect
> > the front GTT when engaged. However, we were "fixing" the hidden ppgtt
> > to match, with the net result that we ended up leaking the unused
> > portion (on Braswell were we preallocated the entire range).
>
> On here I think that the comment is a bit misleading. We preallocate
> the pdps upfront, the va_ranges that the aliasing init does matches
> in size.
>
> As there is two types of 'preallocation' at play in here,
> the commit message should be amended to explicitly state that the top
> pdps leak.
You knew what I meant :-p
Easiest way would to be use gen8_preallocate_top_level_pdp() instead.
-Chris
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