[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS

Patchwork patchwork at emeril.freedesktop.org
Fri Nov 8 09:14:01 UTC 2019


== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e90afdfcc256 drm/i915/icl: Refine PG_HYSTERESIS
9b2231304fc1 drm/i915/execlists: Reduce write flush on context switch to a wmb()
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#12: 
References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")

-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")'
#12: 
References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")

-:32: WARNING:MEMORY_BARRIER: memory barrier without comment
#32: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:1222:
+	wmb();

total: 1 errors, 2 warnings, 0 checks, 14 lines checked
6daf4eb58122 drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
2eb84d65fc46 drm/i915/pmu: Only use exclusive mmio access for gen7



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