[Intel-gfx] [PATCH] drm/i915: Split a setting of MSA to MST and SST

[Ville Syrjälä]

On Thu, Nov 07, 2019 at 03:22:33PM -0800, Lucas De Marchi wrote:
> On Wed, Nov 06, 2019 at 11:26:36PM +0200, Gwan-gyeong Mun wrote:
> >The setting of MSA is done by the DDI .pre_enable() hook. And when we are
> >using MST, the MSA is only set to first mst stream by calling of
> >DDI .pre_eanble() hook. It raies issues to non-first mst streams.
> >Wrong MSA or missed MSA packets might show scrambled screen or wrong
> >screen.
> >
> >This splits a setting of MSA to MST and SST cases. And In the MST case it
> >will call a setting of MSA after an allocating of Virtual Channel from
> >MST encoder pre_enable callback.
> >
> >Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> >Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112212
> >Fixes: 0c06fa156006 ("drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA")
> >Fixes: d4a415dcda35 ("drm/i915: Fix MST oops due to MSA changes")
> >Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> >---
> > drivers/gpu/drm/i915/display/intel_ddi.c    | 10 ++++++----
> > drivers/gpu/drm/i915/display/intel_dp_mst.c |  3 +++
> > 2 files changed, 9 insertions(+), 4 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> >index c91521bcf06a..ef41fa0f77f0 100644
> >--- a/drivers/gpu/drm/i915/display/intel_ddi.c
> >+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> >@@ -1794,10 +1794,8 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
> > 	 * of Color Encoding Format and Content Color Gamut] while sending
> > 	 * YCBCR 420, HDR BT.2020 signals we should program MSA MISC1 fields
> > 	 * which indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> >-	 *
> >-	 * FIXME MST doesn't pass in the conn_state
> > 	 */
> >-	if (conn_state && intel_dp_needs_vsc_sdp(crtc_state, conn_state))
> >+	if (intel_dp_needs_vsc_sdp(crtc_state, conn_state))
> > 		temp |= DP_MSA_MISC_COLOR_VSC_SDP;
> >
> > 	I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);
> >@@ -3606,7 +3604,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> > 	else
> > 		hsw_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
> >
> >-	intel_ddi_set_dp_msa(crtc_state, conn_state);
> >+	/* MST will call a setting of MSA after an allocating of Virtual Channel
> >+	 * from MST encoder pre_enable callback.
> >+	 */
> >+	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> >+		intel_ddi_set_dp_msa(crtc_state, conn_state);
> > }
> >
> > static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
> >diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> >index 5e267c5b4c20..cb77f8072820 100644
> >--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> >+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> >@@ -345,6 +345,9 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
> > 	 */
> > 	if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
> > 		intel_ddi_enable_pipe_clock(pipe_config);
> >+
> >+	intel_ddi_set_dp_msa(pipe_config, conn_state);
> >+
> 
> extra new line here, otherwise

Nuked while pushing to dinq. Thanks for the patch and review.

> 
> 
> Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
> 
> Lucas De Marchi
> 
> > }
> >
> > static void intel_mst_enable_dp(struct intel_encoder *encoder,
> >-- 
> >2.23.0
> >
> >_______________________________________________
> >Intel-gfx mailing list
> >Intel-gfx at lists.freedesktop.org
> >https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel