[Intel-gfx] [PATCH] drm/i915/bios: change slice count check
Jani Nikula
jani.nikula at intel.com
Tue Nov 12 14:38:02 UTC 2019
FIXME: fixup to original.
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 522c399753fe..cdd30eeda7be 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2260,11 +2260,9 @@ static void fill_dsc(struct intel_crtc_state *pipe_config,
*
* Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
*/
- if (dsc->slices_per_line & BIT(2) &&
- pipe_config->hw.adjusted_mode.crtc_hdisplay % 4 == 0) {
+ if (dsc->slices_per_line & BIT(2)) {
pipe_config->dsc.slice_count = 4;
- } else if (dsc->slices_per_line & BIT(1) &&
- pipe_config->hw.adjusted_mode.crtc_hdisplay % 2 == 0) {
+ } else if (dsc->slices_per_line & BIT(1)) {
pipe_config->dsc.slice_count = 2;
} else {
/* FIXME */
@@ -2274,6 +2272,12 @@ static void fill_dsc(struct intel_crtc_state *pipe_config,
pipe_config->dsc.slice_count = 1;
}
+ if (pipe_config->hw.adjusted_mode.crtc_hdisplay %
+ pipe_config->dsc.slice_count != 0)
+ DRM_DEBUG_KMS("DSC hdisplay %d not divisible by slice count %d\n",
+ pipe_config->hw.adjusted_mode.crtc_hdisplay,
+ pipe_config->dsc.slice_count);
+
/* FIXME: rc_buffer_block_size, using defaults in intel_vdsc.c */
/* FIXME: rc_buffer_size, using defaults in intel_vdsc.c */
--
2.20.1
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