[Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Wa_1606679103

[Radhakrishna Sripada]

Extend disabling SAMPLER_STATE prefetch workaround to gen12.

v2: Limit the WA to TGL A0 and update the WA no(Chris)

BSpec: 52890
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index e4bccc14602f..da27eb1cd7cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1370,11 +1370,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 				    GEN7_SARCHKMD,
 				    GEN7_DISABLE_DEMAND_PREFETCH);
 
-		/* Wa_1606682166:icl */
-		wa_write_or(wal,
-			    GEN7_SARCHKMD,
-			    GEN7_DISABLE_SAMPLER_PREFETCH);
-
 		/* Wa_1409178092:icl */
 		wa_write_masked_or(wal,
 				   GEN11_SCRATCH2,
@@ -1382,6 +1377,16 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 				   0);
 	}
 
+	if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0) || IS_GEN(i915, 11)) {
+		/*
+		 * Wa_1606682166:icl
+		 * Wa_1606679103:tgl
+		 */
+		wa_write_or(wal,
+			    GEN7_SARCHKMD,
+			    GEN7_DISABLE_SAMPLER_PREFETCH);
+	}
+
 	if (IS_GEN_RANGE(i915, 9, 11)) {
 		/* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl */
 		wa_masked_en(wal,
-- 
2.20.1