[Intel-gfx] [PATCH 01/10] drm/i915: Change intel_encoders_<hook>() calling convention

Manasi Navare manasi.d.navare at intel.com
Wed Nov 13 23:48:36 UTC 2019


On Tue, Nov 12, 2019 at 04:14:54PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Just pass the atomic state and the crtc to intel_encoders_enable() & co.
> Make life simpler when you don't have to think which state (old vs. new)
> you have to pass in. Also constify the states while at it.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Oh thank you for making life around the encoder functions easier

Reviewed-by: Manasi Navare <manasi.d.navare at intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 101 ++++++++++---------
>  1 file changed, 54 insertions(+), 47 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 5f3340554149..da01fa6928a2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6299,11 +6299,12 @@ static void intel_encoders_update_complete(struct intel_atomic_state *state)
>  	}
>  }
>  
> -static void intel_encoders_pre_pll_enable(struct intel_crtc *crtc,
> -					  struct intel_crtc_state *crtc_state,
> -					  struct intel_atomic_state *state)
> +static void intel_encoders_pre_pll_enable(struct intel_atomic_state *state,
> +					  struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *conn_state;
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct drm_connector_state *conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6319,11 +6320,12 @@ static void intel_encoders_pre_pll_enable(struct intel_crtc *crtc,
>  	}
>  }
>  
> -static void intel_encoders_pre_enable(struct intel_crtc *crtc,
> -				      struct intel_crtc_state *crtc_state,
> -				      struct intel_atomic_state *state)
> +static void intel_encoders_pre_enable(struct intel_atomic_state *state,
> +				      struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *conn_state;
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct drm_connector_state *conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6339,11 +6341,12 @@ static void intel_encoders_pre_enable(struct intel_crtc *crtc,
>  	}
>  }
>  
> -static void intel_encoders_enable(struct intel_crtc *crtc,
> -				  struct intel_crtc_state *crtc_state,
> -				  struct intel_atomic_state *state)
> +static void intel_encoders_enable(struct intel_atomic_state *state,
> +				  struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *conn_state;
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct drm_connector_state *conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6360,11 +6363,12 @@ static void intel_encoders_enable(struct intel_crtc *crtc,
>  	}
>  }
>  
> -static void intel_encoders_disable(struct intel_crtc *crtc,
> -				   struct intel_crtc_state *old_crtc_state,
> -				   struct intel_atomic_state *state)
> +static void intel_encoders_disable(struct intel_atomic_state *state,
> +				   struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *old_conn_state;
> +	const struct intel_crtc_state *old_crtc_state =
> +		intel_atomic_get_old_crtc_state(state, crtc);
> +	const struct drm_connector_state *old_conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6381,11 +6385,12 @@ static void intel_encoders_disable(struct intel_crtc *crtc,
>  	}
>  }
>  
> -static void intel_encoders_post_disable(struct intel_crtc *crtc,
> -					struct intel_crtc_state *old_crtc_state,
> -					struct intel_atomic_state *state)
> +static void intel_encoders_post_disable(struct intel_atomic_state *state,
> +					struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *old_conn_state;
> +	const struct intel_crtc_state *old_crtc_state =
> +		intel_atomic_get_old_crtc_state(state, crtc);
> +	const struct drm_connector_state *old_conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6401,11 +6406,12 @@ static void intel_encoders_post_disable(struct intel_crtc *crtc,
>  	}
>  }
>  
> -static void intel_encoders_post_pll_disable(struct intel_crtc *crtc,
> -					    struct intel_crtc_state *old_crtc_state,
> -					    struct intel_atomic_state *state)
> +static void intel_encoders_post_pll_disable(struct intel_atomic_state *state,
> +					    struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *old_conn_state;
> +	const struct intel_crtc_state *old_crtc_state =
> +		intel_atomic_get_old_crtc_state(state, crtc);
> +	const struct drm_connector_state *old_conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6421,11 +6427,12 @@ static void intel_encoders_post_pll_disable(struct intel_crtc *crtc,
>  	}
>  }
>  
> -static void intel_encoders_update_pipe(struct intel_crtc *crtc,
> -				       struct intel_crtc_state *crtc_state,
> -				       struct intel_atomic_state *state)
> +static void intel_encoders_update_pipe(struct intel_atomic_state *state,
> +				       struct intel_crtc *crtc)
>  {
> -	struct drm_connector_state *conn_state;
> +	const struct intel_crtc_state *crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	const struct drm_connector_state *conn_state;
>  	struct drm_connector *conn;
>  	int i;
>  
> @@ -6492,7 +6499,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
>  
>  	intel_crtc->active = true;
>  
> -	intel_encoders_pre_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_pre_enable(state, intel_crtc);
>  
>  	if (pipe_config->has_pch_encoder) {
>  		/* Note: FDI PLL enabling _must_ be done before we enable the
> @@ -6525,7 +6532,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
>  	assert_vblank_disabled(crtc);
>  	intel_crtc_vblank_on(pipe_config);
>  
> -	intel_encoders_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_enable(state, intel_crtc);
>  
>  	if (HAS_PCH_CPT(dev_priv))
>  		cpt_verify_modeset(dev, intel_crtc->pipe);
> @@ -6596,12 +6603,12 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  	if (WARN_ON(intel_crtc->active))
>  		return;
>  
> -	intel_encoders_pre_pll_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_pre_pll_enable(state, intel_crtc);
>  
>  	if (pipe_config->shared_dpll)
>  		intel_enable_shared_dpll(pipe_config);
>  
> -	intel_encoders_pre_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_pre_enable(state, intel_crtc);
>  
>  	if (intel_crtc_has_dp_encoder(pipe_config))
>  		intel_dp_set_m_n(pipe_config, M1_N1);
> @@ -6679,7 +6686,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>  	assert_vblank_disabled(crtc);
>  	intel_crtc_vblank_on(pipe_config);
>  
> -	intel_encoders_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_enable(state, intel_crtc);
>  
>  	if (psl_clkgate_wa) {
>  		intel_wait_for_vblank(dev_priv, pipe);
> @@ -6727,7 +6734,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
>  	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>  
> -	intel_encoders_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_disable(state, intel_crtc);
>  
>  	drm_crtc_vblank_off(crtc);
>  	assert_vblank_disabled(crtc);
> @@ -6739,7 +6746,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  	if (old_crtc_state->has_pch_encoder)
>  		ironlake_fdi_disable(crtc);
>  
> -	intel_encoders_post_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_post_disable(state, intel_crtc);
>  
>  	if (old_crtc_state->has_pch_encoder) {
>  		ironlake_disable_pch_transcoder(dev_priv, pipe);
> @@ -6777,7 +6784,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>  	enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
>  
> -	intel_encoders_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_disable(state, intel_crtc);
>  
>  	drm_crtc_vblank_off(crtc);
>  	assert_vblank_disabled(crtc);
> @@ -6802,9 +6809,9 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  	else
>  		ironlake_pfit_disable(old_crtc_state);
>  
> -	intel_encoders_post_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_post_disable(state, intel_crtc);
>  
> -	intel_encoders_post_pll_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_post_pll_disable(state, intel_crtc);
>  }
>  
>  static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
> @@ -7035,7 +7042,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
>  
>  	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
>  
> -	intel_encoders_pre_pll_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_pre_pll_enable(state, intel_crtc);
>  
>  	if (IS_CHERRYVIEW(dev_priv)) {
>  		chv_prepare_pll(intel_crtc, pipe_config);
> @@ -7045,7 +7052,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
>  		vlv_enable_pll(intel_crtc, pipe_config);
>  	}
>  
> -	intel_encoders_pre_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_pre_enable(state, intel_crtc);
>  
>  	i9xx_pfit_enable(pipe_config);
>  
> @@ -7060,7 +7067,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
>  	assert_vblank_disabled(crtc);
>  	intel_crtc_vblank_on(pipe_config);
>  
> -	intel_encoders_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_enable(state, intel_crtc);
>  }
>  
>  static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state)
> @@ -7099,7 +7106,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
>  	if (!IS_GEN(dev_priv, 2))
>  		intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
>  
> -	intel_encoders_pre_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_pre_enable(state, intel_crtc);
>  
>  	i9xx_enable_pll(intel_crtc, pipe_config);
>  
> @@ -7120,7 +7127,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
>  	assert_vblank_disabled(crtc);
>  	intel_crtc_vblank_on(pipe_config);
>  
> -	intel_encoders_enable(intel_crtc, pipe_config, state);
> +	intel_encoders_enable(state, intel_crtc);
>  }
>  
>  static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
> @@ -7154,7 +7161,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  	if (IS_GEN(dev_priv, 2))
>  		intel_wait_for_vblank(dev_priv, pipe);
>  
> -	intel_encoders_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_disable(state, intel_crtc);
>  
>  	drm_crtc_vblank_off(crtc);
>  	assert_vblank_disabled(crtc);
> @@ -7163,7 +7170,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  
>  	i9xx_pfit_disable(old_crtc_state);
>  
> -	intel_encoders_post_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_post_disable(state, intel_crtc);
>  
>  	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI)) {
>  		if (IS_CHERRYVIEW(dev_priv))
> @@ -7174,7 +7181,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  			i9xx_disable_pll(old_crtc_state);
>  	}
>  
> -	intel_encoders_post_pll_disable(intel_crtc, old_crtc_state, state);
> +	intel_encoders_post_pll_disable(state, intel_crtc);
>  
>  	if (!IS_GEN(dev_priv, 2))
>  		intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> @@ -14340,7 +14347,7 @@ static void intel_update_crtc(struct intel_crtc *crtc,
>  		intel_pre_plane_update(old_crtc_state, new_crtc_state);
>  
>  		if (new_crtc_state->update_pipe)
> -			intel_encoders_update_pipe(crtc, new_crtc_state, state);
> +			intel_encoders_update_pipe(state, crtc);
>  	}
>  
>  	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
> -- 
> 2.23.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx


More information about the Intel-gfx mailing list