[Intel-gfx] [PATCH 10/10] drm/i915: Change .crtc_enable/disable() calling convention
Manasi Navare
manasi.d.navare at intel.com
Thu Nov 14 00:37:06 UTC 2019
On Tue, Nov 12, 2019 at 04:15:03PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Just pass the atomic state+crtc to the .crtc_enable()
> .crtc_disable(). Life is easier when you don't have to think
> whether to pass the old or the new crtc state.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
makes total sens and indeed easier life,
Reviewed-by: Manasi Navare <manasi.d.navare at intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 58 +++++++++++---------
> drivers/gpu/drm/i915/i915_drv.h | 8 +--
> 2 files changed, 37 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 11953fe06488..96eafd51296c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6460,10 +6460,11 @@ static void intel_disable_primary_plane(const struct intel_crtc_state *crtc_stat
> plane->disable_plane(plane, crtc_state);
> }
>
> -static void ironlake_crtc_enable(struct intel_crtc_state *new_crtc_state,
> - struct intel_atomic_state *state)
> +static void ironlake_crtc_enable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> @@ -6590,10 +6591,11 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc)
> I915_WRITE(PIPE_MBUS_DBOX_CTL(pipe), val);
> }
>
> -static void haswell_crtc_enable(struct intel_crtc_state *new_crtc_state,
> - struct intel_atomic_state *state)
> +static void haswell_crtc_enable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe, hsw_workaround_pipe;
> enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
> @@ -6713,10 +6715,11 @@ static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state)
> }
> }
>
> -static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
> - struct intel_atomic_state *state)
> +static void ironlake_crtc_disable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> @@ -6769,10 +6772,11 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
> }
>
> -static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
> - struct intel_atomic_state *state)
> +static void haswell_crtc_disable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
>
> @@ -7004,10 +7008,11 @@ static void modeset_put_power_domains(struct drm_i915_private *dev_priv,
> intel_display_power_put_unchecked(dev_priv, domain);
> }
>
> -static void valleyview_crtc_enable(struct intel_crtc_state *new_crtc_state,
> - struct intel_atomic_state *state)
> +static void valleyview_crtc_enable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> @@ -7067,10 +7072,11 @@ static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state)
> I915_WRITE(FP1(crtc->pipe), crtc_state->dpll_hw_state.fp1);
> }
>
> -static void i9xx_crtc_enable(struct intel_crtc_state *new_crtc_state,
> - struct intel_atomic_state *state)
> +static void i9xx_crtc_enable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> @@ -7129,10 +7135,11 @@ static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
> I915_WRITE(PFIT_CONTROL, 0);
> }
>
> -static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
> - struct intel_atomic_state *state)
> +static void i9xx_crtc_disable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> + struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> @@ -7218,7 +7225,8 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
>
> WARN_ON(IS_ERR(temp_crtc_state) || ret);
>
> - dev_priv->display.crtc_disable(temp_crtc_state, to_intel_atomic_state(state));
> + dev_priv->display.crtc_disable(to_intel_atomic_state(state),
> + intel_crtc);
>
> drm_atomic_state_put(state);
>
> @@ -14315,7 +14323,7 @@ static void intel_update_crtc(struct intel_crtc *crtc,
> if (modeset) {
> intel_crtc_update_active_timings(new_crtc_state);
>
> - dev_priv->display.crtc_enable(new_crtc_state, state);
> + dev_priv->display.crtc_enable(state, crtc);
>
> /* vblanks work again, re-enable pipe CRC. */
> intel_crtc_enable_pipe_crc(crtc);
> @@ -14386,7 +14394,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> */
> intel_crtc_disable_pipe_crc(crtc);
>
> - dev_priv->display.crtc_disable(old_crtc_state, state);
> + dev_priv->display.crtc_disable(state, crtc);
> crtc->active = false;
> intel_fbc_disable(crtc);
> intel_disable_shared_dpll(old_crtc_state);
> @@ -14501,7 +14509,7 @@ static void intel_crtc_enable_trans_port_sync(struct intel_crtc *crtc,
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>
> intel_crtc_update_active_timings(new_crtc_state);
> - dev_priv->display.crtc_enable(new_crtc_state, state);
> + dev_priv->display.crtc_enable(state, crtc);
> intel_crtc_enable_pipe_crc(crtc);
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 00fe4ed4fb96..af0c5cd59016 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -290,10 +290,10 @@ struct drm_i915_display_funcs {
> struct intel_initial_plane_config *);
> int (*crtc_compute_clock)(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state);
> - void (*crtc_enable)(struct intel_crtc_state *pipe_config,
> - struct intel_atomic_state *old_state);
> - void (*crtc_disable)(struct intel_crtc_state *old_crtc_state,
> - struct intel_atomic_state *old_state);
> + void (*crtc_enable)(struct intel_atomic_state *state,
> + struct intel_crtc *crtc);
> + void (*crtc_disable)(struct intel_atomic_state *state,
> + struct intel_crtc *crtc);
> void (*commit_modeset_enables)(struct intel_atomic_state *state);
> void (*commit_modeset_disables)(struct intel_atomic_state *state);
> void (*audio_codec_enable)(struct intel_encoder *encoder,
> --
> 2.23.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
More information about the Intel-gfx
mailing list