[Intel-gfx] [PATCH] drm/i915: Restore GT coarse power gating workaround

Chris Wilson chris at chris-wilson.co.uk
Thu Nov 14 15:43:07 UTC 2019


Quoting Imre Deak (2019-11-14 15:26:21)
> The workaround to disable coarse power gating is still needed on SKL
> GT3/GT4 machines and since the RC6 context corruption was discovered by
> the hardware team also on all GEN9 machines. Restore applying the
> workaround.
> 
> Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
> Testcase: igt/intel_gt_pm_late_selftests/live_rc6_ctx
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Andi Shyti <andi.shyti at intel.com>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_rc6.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
> index f7c0baeb3793..de2d302e8d55 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> @@ -175,8 +175,10 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
>             GEN6_RC_CTL_RC6_ENABLE |
>             rc6_mode);
>  
> -       set(uncore, GEN9_PG_ENABLE,
> -           GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
> +       /* WaRsDisableCoarsePowerGating:skl,cnl - Render/Media PG need to be disabled with RC6. */
> +       if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))
> +               set(uncore, GEN9_PG_ENABLE,
> +                   GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);

Eeek, I don't even recall noticing it got dropped.

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

It might be more sensible as if (0) since gen9 is forever barred.
-Chris


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