[Intel-gfx] [PATCH] drm/i915: Simplify NEEDS_WaRsDisableCoarsePowerGating

Chris Wilson chris at chris-wilson.co.uk
Fri Nov 15 12:42:01 UTC 2019


Quoting Tvrtko Ursulin (2019-11-15 12:34:28)
> 
> On 15/11/2019 12:27, Chris Wilson wrote:
> > It applies to all gen9 and gen10 now, so we can use a single test
> > against the gen bitmask.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Imre Deak <imre.deak at intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_drv.h | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index a70555e6befb..5fa38c55daa3 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1660,7 +1660,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >   
> >   /* WaRsDisableCoarsePowerGating:skl,cnl */
> >   #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \
> > -     (IS_CANNONLAKE(dev_priv) || IS_GEN(dev_priv, 9))
> > +     IS_GEN_RANGE(dev_priv, 9, 10)
> >   
> >   #define HAS_GMBUS_IRQ(dev_priv) (INTEL_GEN(dev_priv) >= 4)
> >   #define HAS_GMBUS_BURST_READ(dev_priv) (INTEL_GEN(dev_priv) >= 10 || \
> > 
> 
> Marginal benefit and depends on being just one gen 10 but okay:

I think you mean s/one/no/ ;)
-Chris


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