[Intel-gfx] [PATCH 3/4] drm/i915: cpu-map based dumb buffers

Chris Wilson chris at chris-wilson.co.uk
Fri Nov 15 13:54:16 UTC 2019


Quoting Abdiel Janulgue (2019-11-15 11:45:48)
> Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall-
> back to GTT mmaps when hw doesn't support PAT
> 
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
> Cc: Matthew Auld <matthew.auld at intel.com>
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++++++++++++++
>  drivers/gpu/drm/i915/gem/i915_gem_mman.h |  2 ++
>  drivers/gpu/drm/i915/i915_drv.c          |  1 +
>  3 files changed, 21 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index d2ed8a463672..c1756e4f46b9 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -540,6 +540,24 @@ __assign_gem_object_mmap_data(struct drm_file *file,
>         return ret;
>  }
>  
> +int
> +i915_gem_mmap_dumb(struct drm_file *file,
> +                 struct drm_device *dev,
> +                 u32 handle,
> +                 u64 *offset)
> +{
> +       enum i915_mmap_type mmap_type;
> +
> +       if (boot_cpu_has(X86_FEATURE_PAT))
> +               mmap_type = I915_MMAP_TYPE_WC;
> +       else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> +               return -ENODEV;
> +       else
> +               mmap_type = I915_MMAP_TYPE_GTT;
> +
> +       return __assign_gem_object_mmap_data(file, handle, mmap_type, offset);

Looks ok. Just a few nagging doubts about potential existing misuse by
userspace, such as are very using tiling on their dumb buffer, are they
passing in a non-dumb handle?

Of course we will need to beat igt into shape first, as a few pipe-crc
results suggests some not smart use of dumb buffers.
-Chris


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