[Intel-gfx] [RFC 6/7] drm/i915/dp: Update the pattern as per request

[Animesh Manna]

On 11/18/2019 12:11 PM, Manasi Navare wrote:
> On Fri, Nov 15, 2019 at 08:55:48PM +0530, Animesh Manna wrote:
>> set pattern in DP_COMP_CTL.
> It would be nice to have some brief description here on
> context of setting a PHY pattern for PHY compliance and that
> this will be called during pre enable in atomic commit in case
> of phy compliance request etc..and that the requested phy pattern
> is read during test handling etc..
> something that gives a reader a better idea of the context of
> this function
>
>> Signed-off-by: Animesh Manna <animesh.manna at intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c | 55 +++++++++++++++++++++++++
>>   1 file changed, 55 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index a2b860cf3b93..df31278a1619 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -4955,6 +4955,61 @@ static u8 intel_dp_prepare_phytest(struct intel_dp *intel_dp)
>>   	return DP_TEST_ACK;
>>   }
>>   
>> +static inline void intel_dp_phy_pattern_update(struct intel_dp *intel_dp)
>> +{
>> +	struct drm_i915_private *dev_priv =
>> +			to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
>> +	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>> +	struct drm_dp_phy_test_params *data =
>> +			&intel_dp->compliance.test_data.phytest;
>> +	u32 temp;
>> +
>> +	switch (data->phy_pattern) {
>> +	case DP_PHY_TEST_PATTERN_NONE:
>> +		DRM_DEBUG_KMS("Disable Phy Test Pattern\n");
>> +		I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port), 0x0);
>> +		break;
>> +	case DP_PHY_TEST_PATTERN_D10_2:
>> +		DRM_DEBUG_KMS("Set D10.2 Phy Test Pattern\n");
>> +		I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
>> +			   DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_D10_2);
>> +		break;
>> +	case DP_PHY_TEST_PATTERN_ERROR_COUNT:
>> +		DRM_DEBUG_KMS("Set Error Count Phy Test Pattern\n");
>> +		I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
>> +			   DDI_DP_COMP_CTL_ENABLE |
>> +			   DDI_DP_COMP_CTL_SCRAMBLED_0);
>> +		break;
>> +	case DP_PHY_TEST_PATTERN_PRBS7:
>> +		DRM_DEBUG_KMS("Set PRBS7 Phy Test Pattern\n");
>> +		I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
>> +			   DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_PRBS7);
>> +		break;
>> +	case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
>> +		DRM_DEBUG_KMS("Set 80Bit Custom Phy Test Pattern\n");
>> +		temp = ((data->custom80[0] << 24) | (data->custom80[1] << 16) |
>> +			(data->custom80[2] << 8) | (data->custom80[3]));
>> +		I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 0), temp);
>> +		temp = ((data->custom80[4] << 24) | (data->custom80[5] << 16) |
>> +			(data->custom80[6] << 8) | (data->custom80[7]));
>> +		I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 1), temp);
>> +		temp = ((data->custom80[8] << 8) | data->custom80[9]);
>> +		I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 2), temp);
>> +		I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
>> +			   DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_CUSTOM80);
>> +		break;
>> +	case DP_PHY_TEST_PATTERN_CP2520:
>> +		DRM_DEBUG_KMS("Set HBR2 compliance Phy Test Pattern\n");
>> +		temp = ((data->hbr2_reset[1] << 8) | data->hbr2_reset[0]);
>> +		I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
>> +			   DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_HBR2 |
>> +			   temp);
>> +		break;
>> +	default:
>> +		DRM_ERROR("Invalid Phy Test PAttern\n");
> Here we would definitely want a WARN since ERROR at this point in commit is not good
> Other than looks good to me.

Thanks, will add the suggested changes.

Regards,
Animesh
>
> Manasi
>
>> +	}
>> +}
>> +
>>   static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
>>   {
>>   	u8 test_result = DP_TEST_NAK;
>> -- 
>> 2.22.0
>>