[Intel-gfx] [PATCH] drm/i915/gem: Ensure aperture exists before setting domain to GTT
kbuild test robot
lkp at intel.com
Wed Nov 20 09:53:01 UTC 2019
Hi Stuart,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.4-rc8 next-20191119]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Stuart-Summers/drm-i915-gem-Ensure-aperture-exists-before-setting-domain-to-GTT/20191120-111351
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a002-20191120 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.2-10+deb8u1) 4.9.2
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp at intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/gem/i915_gem_domain.c: In function 'i915_gem_object_set_to_gtt_domain':
>> drivers/gpu/drm/i915/gem/i915_gem_domain.c:114:31: error: 'i915' undeclared (first use in this function)
if (!i915_ggtt_has_aperture(&i915->ggtt))
^
drivers/gpu/drm/i915/gem/i915_gem_domain.c:114:31: note: each undeclared identifier is reported only once for each function it appears in
vim +/i915 +114 drivers/gpu/drm/i915/gem/i915_gem_domain.c
98
99 /**
100 * Moves a single object to the GTT read, and possibly write domain.
101 * @obj: object to act on
102 * @write: ask for write access or read only
103 *
104 * This function returns when the move is complete, including waiting on
105 * flushes to occur.
106 */
107 int
108 i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
109 {
110 int ret;
111
112 assert_object_held(obj);
113
> 114 if (!i915_ggtt_has_aperture(&i915->ggtt))
115 return -ENODEV;
116
117 ret = i915_gem_object_wait(obj,
118 I915_WAIT_INTERRUPTIBLE |
119 (write ? I915_WAIT_ALL : 0),
120 MAX_SCHEDULE_TIMEOUT);
121 if (ret)
122 return ret;
123
124 if (obj->write_domain == I915_GEM_DOMAIN_GTT)
125 return 0;
126
127 /* Flush and acquire obj->pages so that we are coherent through
128 * direct access in memory with previous cached writes through
129 * shmemfs and that our cache domain tracking remains valid.
130 * For example, if the obj->filp was moved to swap without us
131 * being notified and releasing the pages, we would mistakenly
132 * continue to assume that the obj remained out of the CPU cached
133 * domain.
134 */
135 ret = i915_gem_object_pin_pages(obj);
136 if (ret)
137 return ret;
138
139 i915_gem_object_flush_write_domain(obj, ~I915_GEM_DOMAIN_GTT);
140
141 /* Serialise direct access to this object with the barriers for
142 * coherent writes from the GPU, by effectively invalidating the
143 * GTT domain upon first access.
144 */
145 if ((obj->read_domains & I915_GEM_DOMAIN_GTT) == 0)
146 mb();
147
148 /* It should now be out of any other write domains, and we can update
149 * the domain values for our changes.
150 */
151 GEM_BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
152 obj->read_domains |= I915_GEM_DOMAIN_GTT;
153 if (write) {
154 obj->read_domains = I915_GEM_DOMAIN_GTT;
155 obj->write_domain = I915_GEM_DOMAIN_GTT;
156 obj->mm.dirty = true;
157 }
158
159 i915_gem_object_unpin_pages(obj);
160 return 0;
161 }
162
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
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