[Intel-gfx] [PATCH 3/3] drm/i915: Skip the Wa_1604555607 verification

Ramalingam C ramalingam.c at intel.com
Wed Nov 20 16:40:20 UTC 2019


At TGL A0 stepping, FF_MODE2 register read back is broken, hence
disabling the WA verification.

Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 8c441bf10cb1..0a3034e841c4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -580,7 +580,10 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
 	val = intel_uncore_read(engine->uncore, FF_MODE2);
 	val &= ~FF_MODE2_TDS_TIMER_MASK;
 	val |= FF_MODE2_TDS_TIMER_128;
-	wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, true);
+	/* At TGL A0 silicon FF_MODE2 reg read is not functional. */
+	wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
+			   !IS_TGL_REVID(engine->uncore->i915, 0,
+					 TGL_REVID_A0));
 }
 
 static void
-- 
2.20.1



More information about the Intel-gfx mailing list