[Intel-gfx] [PATCH] drm/i915: Disable display interrupts during SDE IRQ handler

[Matt Roper]

On Wed, Nov 20, 2019 at 03:40:20PM -0800, clinton.a.taylor at intel.com wrote:
> From: Clint Taylor <clinton.a.taylor at intel.com>
> 
> During the Display Interrupt Service routine the Display Interrupt
> Enable bit must be disabled, The interrupts handled, then the
> Display Interrupt Enable bit must be set to prevent possible missed
> interrupts.
> 
> Bspec: 49212
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Cc: Aditya Swarup <aditya.swarup at intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor at intel.com>

gen8_de_irq_handler does more than just south display interrupts, so I'd
replace s/SDE/display/ in the patch headline.  Aside from that,

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index dae00f7dd7df..43434273a08a 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2484,7 +2484,11 @@ __gen11_irq_handler(struct drm_i915_private * const i915,
>  		 * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
>  		 * for the display related bits.
>  		 */
> +		raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0);
>  		gen8_de_irq_handler(i915, disp_ctl);
> +		raw_reg_write(regs, GEN11_DISPLAY_INT_CTL,
> +					  GEN11_DISPLAY_IRQ_ENABLE);
> +
>  		enable_rpm_wakeref_asserts(&i915->runtime_pm);
>  	}
>  
> -- 
> 2.19.1
> 
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-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795