[Intel-gfx] [PATCH] drm/i915/ggtt: Move ballooning support to i915_ggtt
Michal Wajdeczko
michal.wajdeczko at intel.com
Thu Nov 21 17:58:50 UTC 2019
Today VGT implements GGTT ballooning on its own, using some private
static structure to hold info about reserved GGTT nodes and then
manually update vm.reserved size owned by i915_ggtt.
As i915_ggtt already manages some custom reserved nodes (like uc_fw)
move VGT ballooning support to i915_ggtt and make it more generic
for possible future reuse in other scenarios.
As a bonus we can drop another place in driver that uses static data.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Xiong Zhang <xiong.y.zhang at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula at intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 47 +++++++++++++++++++
drivers/gpu/drm/i915/i915_gem_gtt.h | 18 ++++++++
drivers/gpu/drm/i915/i915_vgpu.c | 72 ++++++-----------------------
3 files changed, 78 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6239a9adbf14..d8b2084dab7e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3827,6 +3827,53 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
start, end, DRM_MM_INSERT_EVICT);
}
+int i915_ggtt_balloon_space(struct i915_ggtt *ggtt,
+ enum i915_ggtt_balloon_id id,
+ u64 start, u64 end)
+{
+ struct drm_mm_node *node = &ggtt->balloon[id];
+ u64 size = end - start;
+ int ret;
+
+ GEM_BUG_ON(id < 0 || id >= ARRAY_SIZE(ggtt->balloon));
+ GEM_BUG_ON(start >= end);
+ DRM_DEV_DEBUG_DRIVER(ggtt->vm.i915->drm.dev,
+ "%sGGTT [%#llx-%#llx] %lluK\n",
+ "ballooning ", start, end, size / SZ_1K);
+
+ ret = i915_gem_gtt_reserve(&ggtt->vm, node, size, start,
+ I915_COLOR_UNEVICTABLE, PIN_NOEVICT);
+ if (unlikely(ret)) {
+ DRM_DEV_ERROR(ggtt->vm.i915->drm.dev,
+ "%sGGTT [%#llx-%#llx] %lluK\n",
+ "Failed to balloon ", node->start,
+ node->start + node->size, node->size / SZ_1K);
+ } else {
+ ggtt->vm.reserved += node->size;
+ }
+
+ return ret;
+}
+
+void i915_ggtt_deballoon_space(struct i915_ggtt *ggtt,
+ enum i915_ggtt_balloon_id id)
+{
+ struct drm_mm_node *node = &ggtt->balloon[id];
+
+ GEM_BUG_ON(id < 0 || id >= ARRAY_SIZE(ggtt->balloon));
+ if (!drm_mm_node_allocated(node))
+ return;
+
+ DRM_DEV_DEBUG_DRIVER(ggtt->vm.i915->drm.dev,
+ "%sGGTT [%#llx-%#llx] %lluK\n",
+ "deballooning ", node->start,
+ node->start + node->size, node->size / SZ_1K);
+
+ GEM_BUG_ON(ggtt->vm.reserved < node->size);
+ ggtt->vm.reserved -= node->size;
+ drm_mm_remove_node(node);
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/mock_gtt.c"
#include "selftests/i915_gem_gtt.c"
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 402283ce2864..ba40cae0e97a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -432,6 +432,12 @@ struct i915_ggtt {
struct drm_mm_node error_capture;
struct drm_mm_node uc_fw;
+
+ /*
+ * There might be up to 4 regions ballooned.
+ * (2 for mappable and 2 for unmappable graphic memory)
+ */
+ struct drm_mm_node balloon[4];
};
struct i915_ppgtt {
@@ -649,6 +655,18 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
u64 size, u64 alignment, unsigned long color,
u64 start, u64 end, unsigned int flags);
+enum i915_ggtt_balloon_id {
+ I915_GGTT_BALLOON0,
+ I915_GGTT_BALLOON1,
+ I915_GGTT_BALLOON2,
+ I915_GGTT_BALLOON3,
+};
+
+int i915_ggtt_balloon_space(struct i915_ggtt *ggtt,
+ enum i915_ggtt_balloon_id id, u64 start, u64 end);
+void i915_ggtt_deballoon_space(struct i915_ggtt *ggtt,
+ enum i915_ggtt_balloon_id id);
+
/* Flags used by pin/bind&friends. */
#define PIN_NOEVICT BIT_ULL(0)
#define PIN_NOSEARCH BIT_ULL(1)
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 968be26735c5..195c27725cbb 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -106,32 +106,6 @@ bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
}
-struct _balloon_info_ {
- /*
- * There are up to 2 regions per mappable/unmappable graphic
- * memory that might be ballooned. Here, index 0/1 is for mappable
- * graphic memory, 2/3 for unmappable graphic memory.
- */
- struct drm_mm_node space[4];
-};
-
-static struct _balloon_info_ bl_info;
-
-static void vgt_deballoon_space(struct i915_ggtt *ggtt,
- struct drm_mm_node *node)
-{
- if (!drm_mm_node_allocated(node))
- return;
-
- DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n",
- node->start,
- node->start + node->size,
- node->size / 1024);
-
- ggtt->vm.reserved -= node->size;
- drm_mm_remove_node(node);
-}
-
/**
* intel_vgt_deballoon - deballoon reserved graphics address trunks
* @ggtt: the global GGTT from which we reserved earlier
@@ -149,28 +123,7 @@ void intel_vgt_deballoon(struct i915_ggtt *ggtt)
DRM_DEBUG("VGT deballoon.\n");
for (i = 0; i < 4; i++)
- vgt_deballoon_space(ggtt, &bl_info.space[i]);
-}
-
-static int vgt_balloon_space(struct i915_ggtt *ggtt,
- struct drm_mm_node *node,
- unsigned long start, unsigned long end)
-{
- unsigned long size = end - start;
- int ret;
-
- if (start >= end)
- return -EINVAL;
-
- DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
- start, end, size / 1024);
- ret = i915_gem_gtt_reserve(&ggtt->vm, node,
- size, start, I915_COLOR_UNEVICTABLE,
- 0);
- if (!ret)
- ggtt->vm.reserved += size;
-
- return ret;
+ i915_ggtt_deballoon_space(ggtt, I915_GGTT_BALLOON0 + i);
}
/**
@@ -256,32 +209,33 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt)
/* Unmappable graphic memory ballooning */
if (unmappable_base > ggtt->mappable_end) {
- ret = vgt_balloon_space(ggtt, &bl_info.space[2],
- ggtt->mappable_end, unmappable_base);
+ ret = i915_ggtt_balloon_space(ggtt, I915_GGTT_BALLOON2,
+ ggtt->mappable_end,
+ unmappable_base);
if (ret)
goto err;
}
if (unmappable_end < ggtt_end) {
- ret = vgt_balloon_space(ggtt, &bl_info.space[3],
- unmappable_end, ggtt_end);
+ ret = i915_ggtt_balloon_space(ggtt, I915_GGTT_BALLOON3,
+ unmappable_end, ggtt_end);
if (ret)
goto err_upon_mappable;
}
/* Mappable graphic memory ballooning */
if (mappable_base) {
- ret = vgt_balloon_space(ggtt, &bl_info.space[0],
- 0, mappable_base);
+ ret = i915_ggtt_balloon_space(ggtt, I915_GGTT_BALLOON0,
+ 0, mappable_base);
if (ret)
goto err_upon_unmappable;
}
if (mappable_end < ggtt->mappable_end) {
- ret = vgt_balloon_space(ggtt, &bl_info.space[1],
- mappable_end, ggtt->mappable_end);
+ ret = i915_ggtt_balloon_space(ggtt, I915_GGTT_BALLOON1,
+ mappable_end, ggtt->mappable_end);
if (ret)
goto err_below_mappable;
@@ -291,11 +245,11 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt)
return 0;
err_below_mappable:
- vgt_deballoon_space(ggtt, &bl_info.space[0]);
+ i915_ggtt_deballoon_space(ggtt, I915_GGTT_BALLOON0);
err_upon_unmappable:
- vgt_deballoon_space(ggtt, &bl_info.space[3]);
+ i915_ggtt_deballoon_space(ggtt, I915_GGTT_BALLOON3);
err_upon_mappable:
- vgt_deballoon_space(ggtt, &bl_info.space[2]);
+ i915_ggtt_deballoon_space(ggtt, I915_GGTT_BALLOON2);
err:
DRM_ERROR("VGT balloon fail\n");
return ret;
--
2.19.2
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