[Intel-gfx] [PATCH] drm/i915/gt: Manual rc6 entry upon parking

[Chris Wilson]

Quoting Imre Deak (2019-11-26 12:22:48)
> Hi,
> 
> On Tue, Nov 26, 2019 at 10:04:35AM +0000, Chris Wilson wrote:
> > Now that we rapidly park the GT when the GPU idles, we often find
> > ourselves idling faster than the RC6 promotion timer. Thus if we tell
> > the GPU to enter RC6 manually as we park, we can do so quicker (by
> > around 50ms, half an EI on average) and marginally increase our
> > powersaving across all execlists platforms.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Andi Shyti <andi.shyti at intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Cc: Imre Deak <imre.deak at intel.com>
> 
> Looks ok:
> Acked-by: Imre Deak <imre.deak at intel.com>
> 
> Does intel_rc6_park() work on VLV/CHV too? I can't see at least that
> we'd enable RC6 on those with GEN6_RC_CTL_RC6_ENABLE.

I have not yet observed any ill effects, but I also haven't completed a
pm run on bsw/byt, so I can not say if it's simply ignored by the PCU.

I'll do a selftest to confirm that by disabling the HW timer and setting
those bits, we do enter rc6 (and vice versa on returning control to HW).
 
> Also what is the value written to GEN6_RC_STATE? Is it ok to use the
> same value after unpark()?

Magic :)

Aiui (based mostly on my own hypothesis and watching the HW) it acts like
a request and will be written over by the HW at the end of its EI (or
whenever exactly it decides on what mode to be in). So as we enable the
HW timers, we lose ownership of that field and control over when to
enter rc6.
-Chris