[Intel-gfx] [PATCH v3 07/13] drm/i915/dsi: set pipe_bpp on ICL configure config

Jani Nikula jani.nikula at intel.com
Tue Nov 26 13:42:42 UTC 2019


The ICL DSI pipe_bpp currently comes from
compute_baseline_pipe_bpp(). Fix it.

Cc: Vandita Kulkarni <vandita.kulkarni at intel.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index f688207932e0..ef53ed6d3ecf 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1286,6 +1286,11 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 	else
 		pipe_config->cpu_transcoder = TRANSCODER_DSI_0;
 
+	if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888)
+		pipe_config->pipe_bpp = 24;
+	else
+		pipe_config->pipe_bpp = 18;
+
 	pipe_config->clock_set = true;
 	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
 
-- 
2.20.1



More information about the Intel-gfx mailing list