[Intel-gfx] [PATCH 5/5] drm/i915/vbt: Parse power conservation features block
Matt Roper
matthew.d.roper at intel.com
Wed Nov 27 18:02:12 UTC 2019
On Mon, Nov 25, 2019 at 04:47:39PM -0800, Souza, Jose wrote:
> On Tue, 2019-11-12 at 23:56 +0000, Souza, Jose wrote:
> > On Tue, 2019-11-12 at 13:21 -0800, Matt Roper wrote:
> > > On Tue, Nov 05, 2019 at 05:45:04PM -0800, José Roberto de Souza
> > > wrote:
> > > > Since VBT 228 is from this block that PSR and other power saving
> > > > features configuration should be read from.
> > > >
> > > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> > > > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_bios.c | 19 +++++++++++-
> > > > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 29
> > > > +++++++++++++++++++
> > > > 2 files changed, 47 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> > > > b/drivers/gpu/drm/i915/display/intel_bios.c
> > > > index a03f56b7b4ef..bf79e9858bd8 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_bios.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> > > > @@ -561,7 +561,23 @@ parse_driver_features(struct
> > > > drm_i915_private
> > > > *dev_priv,
> > > > */
> > > > if (!driver->drrs_enabled)
> > > > dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
> > > > - dev_priv->vbt.psr.enable = driver->psr_enabled;
> > > > + if (bdb->version < 228)
> > > > + dev_priv->vbt.psr.enable = driver->psr_enabled;
> > > > +}
> > > > +
> > > > +static void
> > > > +parse_power_conservation_features(struct drm_i915_private
> > > > *dev_priv,
> > > > + const struct bdb_header *bdb)
> > > > +{
> > > > + const struct bdb_lfp_power *power;
> > > > + u8 panel_type = dev_priv->vbt.panel_type;
> > > > +
> > > > + power = find_section(bdb, BDB_LVDS_POWER);
> > > > + if (!power)
> > > > + return;
> > > > +
> > > > + if (bdb->version >= 228)
> > > > + dev_priv->vbt.psr.enable = power->psr & (1 <<
> > > > panel_type);
> > >
> > > Should we also be setting dev_priv->vbt.drrs_type =
> > > DRRS_NOT_SUPPORTED
> > > if block 44 tells us it isn't valid on this panel?
> > >
> >
> > Yep, it should.
> > Thanks for catching this.
>
> Nothing from block 40 is obsolete, it has the information about the
> DRRS type of all the 16 possible panels so is better keep relying on it
> as block 44 only have only the information if DRRS is supported or not.
>
> I also checked the other features but we don't implement those.
I think the DRRS_NOT_SUPPORTED is currently being set based on the
contents of block 12 (in parse_driver_features). Block 12 does list the
bit we're looking at as obsolete in version 228 (moved to block 44).
Matt
>
>
> >
> > > Matt
> > >
> > > > }
> > > >
> > > > static void
> > > > @@ -1878,6 +1894,7 @@ void intel_bios_init(struct
> > > > drm_i915_private
> > > > *dev_priv)
> > > > parse_lfp_backlight(dev_priv, bdb);
> > > > parse_sdvo_panel_data(dev_priv, bdb);
> > > > parse_driver_features(dev_priv, bdb);
> > > > + parse_power_conservation_features(dev_priv, bdb);
> > > > parse_edp(dev_priv, bdb);
> > > > parse_psr(dev_priv, bdb);
> > > > parse_mipi_config(dev_priv, bdb);
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > > > b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > > > index 69a7cb1fa121..31f47ce56587 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> > > > @@ -792,6 +792,35 @@ struct bdb_lfp_backlight_data {
> > > > struct lfp_backlight_control_method backlight_control[16];
> > > > } __packed;
> > > >
> > > > +/*
> > > > + * Block 44 - LFP Power Conservation Features Block
> > > > + */
> > > > +
> > > > +struct als_data_entry {
> > > > + u16 backlight_adjust;
> > > > + u16 lux;
> > > > +} __packed;
> > > > +
> > > > +struct agressiveness_profile_entry {
> > > > + u8 dpst_agressiveness : 4;
> > > > + u8 lace_agressiveness : 4;
> > > > +} __packed;
> > > > +
> > > > +struct bdb_lfp_power {
> > > > + u8 lfp_feature_bits;
> > > > + struct als_data_entry als[5];
> > > > + u8 lace_aggressiveness_profile;
> > > > + u16 dpst;
> > > > + u16 psr;
> > > > + u16 drrs;
> > > > + u16 lace_support;
> > > > + u16 adt;
> > > > + u16 dmrrs;
> > > > + u16 adb;
> > > > + u16 lace_enabled_status;
> > > > + struct agressiveness_profile_entry aggressivenes[16];
> > > > +} __packed;
> > > > +
> > > > /*
> > > > * Block 52 - MIPI Configuration Block
> > > > */
> > > > --
> > > > 2.24.0
> > > >
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--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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