[Intel-gfx] [PATCH] drm/i915: Use the correct PCH transcoder for LPT/WPT in intel_sanitize_frame_start_delay()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

LPT/WPT only have PCH transcoder A. Make sure we poke at its
chicken register instead of some non-existent register when
FDI is being driven by pipe B or C.

Cc: Uma Shankar <uma.shankar at intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 53dc310a5f6d..f99dbc3d9696 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17272,7 +17272,8 @@ static void intel_sanitize_frame_start_delay(const struct intel_crtc_state *crtc
 		val |= TRANS_FRAME_START_DELAY(0);
 		I915_WRITE(reg, val);
 	} else {
-		i915_reg_t reg = TRANS_CHICKEN2(crtc->pipe);
+		enum pipe pch_transcoder = intel_crtc_pch_transcoder(crtc);
+		i915_reg_t reg = TRANS_CHICKEN2(pch_transcoder);
 		u32 val;
 
 		val = I915_READ(reg);
-- 
2.23.0