[Intel-gfx] [PATCH 1/2] drm/i915: Fix audio power up sequence for gen10/11

[Chris Wilson]

Quoting Kai Vehmanen (2019-10-01 17:35:54)
> On gen10/11 platforms, driver must set the enable bit of AUD_PIN_BUF_CTL
> as part of audio power up sequence.
> 
> Failing to do this resulted in errors during display audio codec probe,
> and failures during resume from suspend.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111214
> Signed-off-by: Kai Vehmanen <kai.vehmanen at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_audio.c | 5 +++++
>  drivers/gpu/drm/i915/i915_reg.h            | 2 ++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 54638d99e021..a731af7ada08 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -862,6 +862,11 @@ static unsigned long i915_audio_component_get_power(struct device *kdev)
>                 /* Force CDCLK to 2*BCLK as long as we need audio powered. */
>                 if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
>                         glk_force_audio_cdclk(dev_priv, true);
> +
> +               if (INTEL_GEN(dev_priv) == 11 || INTEL_GEN(dev_priv) == 10)
> +                       I915_WRITE(AUD_PIN_BUF_CTL,
> +                                  (I915_READ(AUD_PIN_BUF_CTL) |
> +                                   AUD_PIN_BUF_ENABLE));

From the observation that this reduces the module reload time from 196s
to 2s, I'd say this works.

Do you need to disable the bit later?
-Chris